[vhdl-200x] RE: Next Meeting Dates

From: Peter Ashenden <peter@ashenden.com.au>
Date: Mon Nov 01 2004 - 18:59:51 PST

Jim,

I suspect you misread your calendar. Could you please check and confirm the
correct dates? Thanks.

Cheers,

PA

--
Dr. Peter J. Ashenden                        peter@ashenden.com.au
Ashenden Designs Pty. Ltd.                   www.ashenden.com.au
PO Box 640                                   Ph:  +61 8 8339 7532
Stirling, SA 5152                            Fax: +61 8 8339 2616
Australia                                    Mobile: +61 414 70 9106
> -----Original Message-----
> From: Jim Lewis [mailto:Jim@SynthWorks.com] 
> Sent: Tuesday, 2 November 2004 13:25
> To: Peter Ashenden; VHDL-200x; vhdl-200x-ft@server.eda.org
> Subject: Next Meeting Dates
> 
> 
> Hi,
> The next couple planned meeting dates are:
>    Monday Nov 8:     2-4 pm PST.
>    Tuesday Nov 15:   In person meeting, Mentor San Jose
>    Monday Nov 25th:  2-4 pm PST.
>    Monday Nov 29th:  2-4 pm PST.
> 
> All of these meetings will be based completed action items.
> Up to now all meetings have lasted the full amount of time, 
> however, today's meeting only lasted 45 minutes due to lack 
> of closed action items (several of them mine).
> 
> My near term plans (for this week) are to update the
> website and send out an action item list.
> 
> Best Regards,
> Jim
> 
> > Jim,
> > 
> > Thanks.  Is the schedule to have a telecon every week, or with 
> > different frequency?
> > 
> > Cheers,
> > 
> > PA
> > 
> > --
> > Dr. Peter J. Ashenden                        peter@ashenden.com.au
> > Ashenden Designs Pty. Ltd.                   www.ashenden.com.au
> > PO Box 640                                   Ph:  +61 8 8339 7532
> > Stirling, SA 5152                            Fax: +61 8 8339 2616
> > Australia                                    Mobile: +61 414 70 9106
> > 
> > 
> > 
> >>-----Original Message-----
> >>From: Jim Lewis [mailto:Jim@SynthWorks.com]
> >>Sent: Tuesday, 2 November 2004 11:11
> >>To: Peter Ashenden
> >>Subject: Re: [vhdl-200x-ft] Reminder: Monday Nov 1 VHDL-200x 
> >>FT Review Meeting
> >>
> >>
> >>Peter,
> >>Sure.  I have been on travel, so it is a little
> >>difficult keeping up myself.  Provided that people
> >>get action items done, I plan on having a meeting
> >>next Monday at the regular time.
> >>
> >>Cheers,
> >>Jim
> >>
> >>
> >>
> >>
> >>>Jim,
> >>>
> >>>I didn't receive this message until 04:31 this morning, and
> >>
> >>only just
> >>
> >>>read it.  Could you please let me know the schedule for future
> >>>meetings so that I can put them in my calendar.  I am more 
> >>
> >>likely to
> >>
> >>>be able to participate, now that we're on summer time.  Thanks.
> >>>
> >>>Cheers,
> >>>
> >>>PA
> >>>
> >>>--
> >>>Dr. Peter J. Ashenden                        peter@ashenden.com.au
> >>>Ashenden Designs Pty. Ltd.                   www.ashenden.com.au
> >>>PO Box 640                                   Ph:  +61 8 8339 7532
> >>>Stirling, SA 5152                            Fax: +61 8 8339 2616
> >>>Australia                                    Mobile: +61 
> 414 70 9106
> >>>
> >>>
> >>>
> >>>
> >>>>-----Original Message-----
> >>>>From: owner-vhdl-200x-ft@eda.org 
> [mailto:owner-vhdl-200x-ft@eda.org] 
> >>>>On Behalf Of Jim Lewis
> >>>>Sent: Tuesday, 2 November 2004 04:31
> >>>>To: VHDL-200x; vhdl-200x-ft@eda.org
> >>>>Subject: [vhdl-200x-ft] Reminder: Monday Nov 1 VHDL-200x FT
> >>>>Review Meeting
> >>>>
> >>>>
> >>>>Next VHDL-200X-FT Review Meeting:
> >>>>   Monday, Nov 1, 2004
> >>>>   2-4 PM PST,  3-5 PM MST, 5-7 PM EST.
> >>>>
> >>>>
> >>>>Please review the IEEE pat policy before the meeting:
> >>>>    http://standards.ieee.org/board/pat/pat-slideset.ppt
> >>>>
> >>>>John Ries will be leading the meeting
> >>>>
> >>>>Dial in information (same every week)
> >>>>   888-742-8686
> >>>>   303-928-2600 (int'l)
> >>>>   Conference ID:  4737027
> >>>>
> >>>>Agenda:
> >>>>  Any Open Action Items from Below
> >>>>  Continue Package Revision Discussion
> >>>>
> >>>>Open Action Items:
> >>>>  FT07   Charlie/Steve   Need to resolve issues with alias 
> >>>>or propose procedures
> >>>>  FT11   Peter Ashenden  Write up with delta cycle delay for 
> >>>>expressions
> >>>>  FT12   Steve Bailey    Read Out Ports
> >>>>  FT13   Steve Bailey    Remove Reset, add Restart
> >>>>  FT22-25 John Ries      Case Statements ... Close action items
> >>>>
> >>>>
> >>>>
> >>>>Regards,
> >>>>Jim
> >>>>-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> >>>>Jim Lewis
> >>>>Director of Training             mailto:Jim@SynthWorks.com
> >>>>SynthWorks Design Inc.           http://www.SynthWorks.com
> >>>>1-503-590-4787
> >>>>
> >>>>Expert VHDL Training for Hardware Design and Verification 
> >>>>~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>
> >>>
> >>>
> >>>
> >>
> >>--
> >>~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> >>Jim Lewis
> >>Director of Training             mailto:Jim@SynthWorks.com
> >>SynthWorks Design Inc.           http://www.SynthWorks.com
> >>1-503-590-4787
> >>
> >>Expert VHDL Training for Hardware Design and Verification
> >>~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> >>
> > 
> > 
> > 
> > 
> 
> 
> -- 
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> Jim Lewis
> Director of Training             mailto:Jim@SynthWorks.com
> SynthWorks Design Inc.           http://www.SynthWorks.com
> 1-503-590-4787
> 
> Expert VHDL Training for Hardware Design and Verification 
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> 
Received on Mon Nov 1 18:59:49 2004

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