RE: [vhdl-200x] Call for Vote: Motion to Approve Draft PAR Submi ssion

Paul,

  When I listened to the presentation, I was more suspicious that the position they were taking was defensive rather than constructive to the progress of VHDL. So, I think it will be very difficult to determine what substance they really offered.

  It was often pointed out, and in the body of their paper, "three years after the fact- only one vendor has completely implement [sic] VHDL 1993". (By the way, VHDL93 really would have been VHDL92 if the spec had been printed on time, so in 1997, one could claim implementations were already 5-years late.) It was used as direct evidence that it was too hard to implement, not needed and, as proposed here, reason to attack the VASG.

  Being with the vendor that had a complete implementation, I suspected there were other defensive motivations on their part.

  That evening, after their presentation, when I met with Oz and Stan, I told them if their position is to believed, they will need to engage with the IEEE/DASC/VASG to explore change. And if their position is not honorable, I will remember what they did and they will be called to task. I don't think the eda.org reflectors show much traffic from Cadence after this presentation until recently.

  My conclusion is this was a defensive position when faced with being two revisions of the standard behind.

  SystemVerilog ignited a much similar response. However, since I was witness to the VHDL behavior, I could predict what the Cadence response to SystemVerilog would be. And true to the notice I gave Oz and Stan in 1997, I only saw Cadence actions as defensive, not constructive.

-Dennis

-----Original Message-----
From: owner-vhdl-200x@eda.org [mailto:owner-vhdl-200x@eda.org] On Behalf Of Paul Graham
Sent: Wednesday, July 21, 2004 7:38 AM
To: vhdl-200x@eda.org
Subject: Re: [vhdl-200x] Call for Vote: Motion to Approve Draft PAR Submi ssion

> The slow uptake by the industry of VHDL-93 is proof in point that was
> well described by the Cadence Design Systems tutorial at CHDL-97 where
> they fired the "'shot over the bow' in the VHDL 1998 wars".
> (See http://www.it.uc3m.es/~ifip/chdl97/tut-mb.html).

Just curious, does anyone have the text of this tutorial? Or do you know what features Stan K. and others wanted to remove from VHDL?

Paul
Received on Sun Aug 8 14:18:00 2004