Bailey, Stephen wrote:
> Evan,
>
> There is a need for explanation on your comment WRT FVTC and
> Accellera. There are currently more tools that support PSL than
> support SystemVerilog Assertions. So, what do you mean by "the
> entities simply ignored the work and did what they wanted anyway."
The technical work that the FVTC did resulted in PSL 1.01, which was
based on Sugar 2. When they'd essentially finished this work, the
Accellera board informed them that it was unsuitable for SystemVerilog,
and that they would have to converge it with OVA, with no technical
justification whatsoever. The result is PSL 1.1. For the detail, see the
third item in
This is a perfect example of the strains that would exist in a group
which was entity-controlled, but in which the technical work was done on
an individual basis. 'Individual experts' do not have the same agenda as
EDA vendors.
> Also, if you believe that the FVTC and Accellera failed with PSL,
> then how is it that it failed and why is that failure related to
> Accellera's organizational entity membership?
I believe that the FVTC did a very good job. The result was, however,
incompatible with the political goals of Accellera, following the OVA
donation to Accellera. Anybody who disagrees with this should study the
link above carefully and provide a detailed rebuttal.
A WG which is entity-based will inevitably be driven by a political
agenda. This may or may not be a good thing, but I personally don't
believe that it's the role of the IEEE to go down this road. If we can't
get the funding to carry on on the current basis, then I don't believe
that the work is worth doing.
Evan Lavelle
Received on Wed Jun 23 14:48:27 2004
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