Subject: (no subject)
From: Paul J. Menchini (mench@mench.com)
Date: Mon Jun 09 2003 - 10:10:58 PDT
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Date: Mon, 9 Jun 2003 10:06:20 -0700 (PDT)
From: Wolfgang Roethig <wroethig@necelam.com>
Reply-To: Wolfgang Roethig <wroethig@necelam.com>
Subject: Re: [vhdl-200x] Re: Fork/Join
To: vhdl-200x@server.eda.org, vhdl-200x@grfx.com
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"Fork" and "join" is actually Verilog 95.
Statements enclosed by "fork" and "join" are
executed concurrently, whereas statements
enclosed by "begin" and "end" are executed
sequentially.
Since translators and simulators with dual
language support have been around for a while,
the VHDL equivalent of "fork" and "join" should
already exist. No need to extend VHDL for this
feature.
People have argued that VHDL has already
a richer description capability than Verilog,
and SystemVerilog basically catches up with VHDL.
Therefore my recommendation is to establish a
correspondence between VHDL and SystemVerilog first
before creating a list of required VHDL enhancements.
Wolfgang
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> From: vhdl-200x@grfx.com
> To: vhdl-200x@eda.org
> Subject: [vhdl-200x] Re: Fork/Join
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>
> I noticed that adding fork/join (a la SystemVerilog) was on
> someone's list of enhancements. I would highly recommend not
> adding fork/join and instead just add a means of creating
> single threads dynamically and add proper thread control
> in the style of the Posix threads library - the fork/join
> syntax doesn't lend itself to capturing thread identifiers
> and makes fine-grained control difficult.
>
> Kev.
>
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