AW: [vhdl-200x] Re: TBV2: Associative arrays proposal submitted


Subject: AW: [vhdl-200x] Re: TBV2: Associative arrays proposal submitted
From: Wolfgang.Ecker@infineon.com
Date: Tue Apr 29 2003 - 01:46:13 PDT


One reasons for our use of bit-vectors are numbers with size > 32 bit. This
is needed because
VHDL integers support 32 bit only (if they do). For the testbench we use
integer vectors but
this is not appropriate solution for synthesis.

The other reason for using bit_vector is the missing bit level semantic of
integers and
the lack of logical operators (AND, OR, etc.) for integr values. We also
have packages for that
purpose, however do not use them in Synthesis.

Wolfgang

-----Ursprüngliche Nachricht-----
Von: Erich Marschner [mailto:erichm@cadence.com]
Gesendet am: Montag, 28. April 2003 22:51
An: Allan Herriman; Farrell Ostler
Cc: Jim Goeke; Jim@synthworks.com; vhdl-200x@eda.org
Betreff: RE: [vhdl-200x] Re: TBV2: Associative arrays proposal submitted

One of the reasons for modeling a bus as a bit-vector is the fact that
values of different data types may be transferred via the same bus. The
same can be said of memories. If you have to convert a real number to an
integer in order to send it over a bus, or store it in memory, significant
information will be lost. If you map each data type to be transferred to a
(portion of a) bit-vector, no information is lost.

Erich

-------------------------------------------
Erich Marschner, Cadence Design Systems
Senior Architect, Advanced Verification
Phone: +1 410 750 6995 Email: erichm@cadence.com
Vmail: +1 410 872 4369 Email: erichm@comcast.net

| -----Original Message-----
| From: Allan Herriman [mailto:allan_herriman@agilent.com]
| Sent: Monday, April 28, 2003 2:24 PM
| To: Farrell Ostler
| Cc: Jim Goeke; Jim@synthworks.com; vhdl-200x@eda.org
| Subject: Re: [vhdl-200x] Re: TBV2: Associative arrays
| proposal submitted
|
|
| Farrell Ostler wrote:
| >
| > Jim Goeke wrote:
| >
| >
| >>It may be how people have historically written models but
| should we continue to
| >>bank on that? In the past there were many tool
| constraints that prevented using
| >>anything but vectors, that is no longer the case. We have
| written complete
| >>(synthesizable) designs using integer based types for for
| everything except the
| >>usual cast of control bits where it doesn't make much
| sense. With properly
| >>ranged integer subtypes the tools now do the "right" thing.
| >
| >
| > Have you been bothered much by the fact that integers are
| not guaranteed
| > to have a range larger than -2^31-1 to 2^31-1?
|
| In practice a simulator or synthesiser on a 32 bit platform
| will give
| you a range of -2^31 to 2^31-1. I don't know of any exceptions.
|
| This doesn't help if you have a > 32 bit address bus though.
|
| Regards,
| Allan.
| --
| Allan Herriman
| Advanced Networks Division +61 3 9210 5527 Tel
| Agilent Technologies, Inc. +61 3 9210 5550 Fax
| 347 Burwood Highway Forest Hill 3131 Australia
|
|



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