Re: [vhdl-200x] Re: TBV2: Associative arrays proposal submitted


Subject: Re: [vhdl-200x] Re: TBV2: Associative arrays proposal submitted
From: Rob Anderson (rob@reawebtech.com)
Date: Mon Apr 28 2003 - 12:23:38 PDT


Jim Groke said:

> We have written complete
> (synthesizable) designs using integer based types for for
> everything except the
> usual cast of control bits where it doesn't make much sense.
> With properly
> ranged integer subtypes the tools now do the "right" thing.
>

Your last sentence above
says to me there is something missing in our formal
synthesis standards. Within one compilation you might
be ok to rely on a particular vendor, but it would be
nice if separate compilation was thought about.

Consider the following case:

subtype anint: integer range 128 to 255;
signal anint1: anint;

The size and interpretation of the synthesized vector depends on
the tool convention! This vector could be length 7, but
we see 8 bits usually.

Rather than mandate one way of mapping it, perhaps
we could add mapping attributes and allow tools to do
the most optimal things they can.

>>>
>
>



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