RE: [vhdl-200x] Predefined array types

Subject: RE: [vhdl-200x] Predefined array types
From: Jayaram Bhasker (JBhasker@eSilicon.com)
Date: Thu Mar 06 2003 - 08:56:17 PST

Hello Bob:

Thanks for the feedback. I am the team leader for testbench/verification enhancements.
I have noted your request and am looking forward to discussing this in the near future.

- bhasker

------
J. Bhasker, eSilicon Corp
1605 N. Cedar Crest Blvd, Ste 615, Allentown, PA 18104
jbhasker@esilicon.com, 610.439.6831, 610.770.9634(fax)

-----Original Message-----
From: Robert Ingham [mailto:robert.ingham@candc.co.uk]
Sent: Thursday, March 06, 2003 11:23 AM
To: vhdl-200x@server.eda.org
Subject: [vhdl-200x] Predefined array types

I would like to see the following additional predefined array types:

    type boolean_vector is array (natural range <>) of boolean;
    type integer_vector is array (natural range <>) of integer;
    type real_vector is array (natural range <>) of real;

I have found these useful in developing verification models, and the
'boolean_vector' type useful in developing parameterized modules where the
number of I/O sub-modules is passed in as a generic. I note that the
'boolean' type is now well supported for synthesis. It may be that

    type time_vector is array (natural range <>) of time;

is also of some merit. 

--
  Robert Ingham
  Principal Engineer
  Communication & Control Electronics Limited

  Email: robert.ingham@candc.co.uk
  WWW:   http://www.candc.co.uk
--

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