[vhdl-200x] nanosecond resolution


Subject: [vhdl-200x] nanosecond resolution
From: Stephen Bailey (Stephen.Bailey@synopsys.com)
Date: Wed Mar 05 2003 - 14:12:55 PST


David Bishop sent this to the reflector. It bounced (non-member submission). I
will look into why this bounced as Dave's Kodak email address is in the
post-as-well list.

As per the contents of the original email: David, can you point out where the
LRM defines the default resolution at NS? In 1076-2002, 3.1.3.1, I have found:

"By default, the primary unit of type TIME (1 femtosecond) is the *resolution
limit* for type TIME. Any TIME value whose absolute value is smaller than this
limit is truncated to zero (0) time units. An implementation may allow a given
execution of a model (see 12.6) to select a secondary unit of type TIME as the
resolution limit."

Clearly, this section states that the defaul time resolution is 1 fs, not 1 ns.

Section 12.6.4 does say "At the beginning of initialization, the current time,
Tc is assumed to be 0 ns."

However, 0 ns = 0 fs = 0 hrs = 0. This sentence does not establish a default
time resolution.

-Steve Bailey

> As long as we are thinking about this....
>
> The default resolution for VHDL is defined in the LRM
> as "ns". Technology has really passed this by. It should
> now be "ps".
>
> One of the first things you have to do in every VHDL FPGA
> or ASIC simulation that I know of these days is to set your
> resolution up to "ps". There is also no way to trap what
> your simulation resolution is in VHDL.
>
> --
> David W. Bishop dbishop@vhdl.org
>



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