Subject: Re: [vhdl-200x] DVCon meeting Action Item List -> FastTrack
From: Stephen Bailey (Stephen.Bailey@synopsys.com)
Date: Sun Mar 02 2003 - 20:22:46 PST
John's reply bounced due to the reply-to address not being the same as his
subscription address. (John, I've added john.willis@ftlsys.com to the post-as
permission list.)
-Steve Bailey
> Jim,
>
> This is to acknowledge that I have the action item to
> collate the pending ISAC issue titles into a summary
> file the week after DATE, then to see that we get a
> Fast Track candidate list out (as a team).
>
> I propose that several people from the Fast Track
> team scan the list for Fast Track candidates. Peter
> Ashenden has volunteered some time for this. Will you
> as well? Any other volunteers to spend 1 to 4 hours?
>
> Thanks! John
>
> --On Saturday, March 01, 2003 12:43 PM -0800 Jim Lewis
> <Jim@synthworks.com> wrote:
>
> > Here is the list of action items from the DVCon meeting.
> >
> > 1) Provide the historical documents on the Guidelines on
> > VHDL Philosophy. AI to Paul M, Chuck S, and David B.
> >
> > 2) Review ISAC list of items for fast track group
> > Currently on the list is Explicit/Implicit operator
> > overloading.
> >
> > AI to ?John Willis?
> >
> > 3) Steve Bailey to call for fast track items and
> > overview on Fast Track Philosophy
> >
> > 4) Paul to create reflectors.
> >
> >
> > Cheers,
> > Jim
> >
> >
> > --
> > ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> > ~~ Jim Lewis
> > Director of Training mailto:Jim@SynthWorks.com
> > SynthWorks Design Inc. http://www.SynthWorks.com
> > 1-503-590-4787
> >
> > Expert VHDL Training for Hardware Design and Verification
> > ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> > ~~
> >
> >
>
>
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