RE: [P1800] P1800 SystemVerilog Ballot Draft (4.0) is ready

From: <Shalom.Bresticker_ f rom _freescale.com>
Date: Thu Feb 17 2005 - 00:20:41 PST
Stu,

To avoid confusion, I suggest you advance the draft numbering to 5
even though the changes are very minor.

I will similarly advance the 1364 draft number to 7.

Shalom


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Shalom Bresticker                        Shalom.Bresticker @freescale.com
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Received on Thu Feb 17 00:20:52 2005

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