SystemVerilog Specification with IEEE Copyright

Dear P1800 Working Group,
 
  Accellera has delivered an acceptable copyright assignment statement for SystemVerilog 3.1a to the IEEE. This is now on file with the IEEE-SA property rights manager.
 
  In addition to this, and in keeping with the IEEE-SA Standards Board Operations Manual clause 4.1.1.5 (http://standards.ieee.org/guides/opman/sb-om.pdf <http://standards.ieee.org/guides/opman/sb-om.pdf> ), all statements that place any burden on the recipient(s) with respect to confidentiality or copyright have been removed. In their place the mandated IEEE copyright has been added.
 
  You can find a copy of this Draft 01 documentation at http://www.eda-twiki.org/sv-ieee1800/Specifications/IEEE-P1800-D01.pdf <http://www.eda-twiki.org/sv-ieee1800/Specifications/IEEE-P1800-D01.pdf> . Again, the content is identical to the Accellera 3.1a specification except that any Accellera confidentiality or copyright notices have been removed and replaced with IEEE mandated text.
 
Regards,
 
Dennis
Received on Wed Aug 4 16:09:32 2004