[sv-dc] Port directions

Just a note on port directions:

The markers for port direction (input/output/inout) can only apply for certain driver/receiver types, i.e. they make sense for "logic" drivers and receivers, but not for analog types. Since users like to add direction to ports regardless of how the driver/receiver mechanisms actually work, it is probably best if the enforcement of port direction is part of the type definition. Since the existing behavior for "logic" is strict enforcement, the default behavior should be that, with a type attribute being added to say the direction is not enforced, e.g.:

    class Thev_t....

       function bool enforce_directions;
          enforce_directions=false;
       endfunction;

I use a member function so that it gets inherited.

If you do cross type resolution as I previously described by converting drivers before resolving, the direction rules would be checked at the level of the resolution, i.e. if logic drivers were converted to Thev_t drivers the direction rules would be ignored.

Extensions of the methodology could include adding user-defined check routines for the different i/o cases, e.g.:

       function bool enforce_directions(port_direction io);
          case (io)
             output: // check for driver below
                     ...;
             input: // check no drivers below
                     ...;
          endcase
          enforce_directions=false; //OK
       endfunction;

- you could add more i/o keywords and checks if you wanted, e.g. testing for a pull-up in wired-or.

Kev.

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