Re: [sv-dc] SV-DC roadmap update

Hi Ian, hi Scott,

I think it is a great idea to have regular meetings for discussing issues of interest.
A specific goal might be e.g. to develop a methodology for CM-insertion/resolution/synchronization
of mixed nets that transport electrical, real/aggregate and digital data.
Another (longterm-)issue might be to brainstorm about a clean integration of ASVA within analog Verilog-AMS blocks.

Best regards,
                   Achim

  ----- Original Message -----
  From: Ian Wilson
  To: Little Scott-B11206
  Cc: sv-dc@eda.org
  Sent: Tuesday, September 14, 2010 10:06 PM
  Subject: Re: [sv-dc] SV-DC roadmap update

  I agree that it would be a good idea to have a regular sync-up meeting.
  Can we come up with a specific goal rather than to discuss issues of
  interest?

  --ian

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Ian M Wilson
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Berkeley Design Automation
Office: 408-496-6600 x238
Cell: 714-272-7040
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  Little Scott-B11206 wrote:
Hi all:

After attending the recent Verilog-AMS and SV-DC meetings and thinking
about the happenings there it seems to me that it would be nice to have
a regularly scheduled sync-up meeting to ensure that both groups are
aware of each other's progress and technical issues of common interest.
As such, I think we should add the following statement to the
"Relationship to Verilog-AMS" section of the roadmap. Thoughts?

Subgroups of the Verilog-AMS and SV-DC committees will meet regularly to
discuss technical issues of interest between the two committees.

Thanks,
Scott

  
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