[sv-dc] roadmap corrections

Scott,
Looking over the roadmap, could you make the following corrections/updates?
Thanks,
-Martin

* There is a reference to the "2012 PAR" in the last section. There is no 2012 PAR. The P1800 PAR has an expiration date of December 31, 2014. The fact that the WG is aiming for an updated standard in the 2012 timeframe is irrelevant to the nature of the PAR. What should be referred to is the "2012 Standard" or "2012 Updated Standard" or something like that.

* the full facts about the VAMS-SV merger are not described - it says;
" SV-DC is also aware that work to merge
SystemVerilog and Verilog-AMS has started, although completion of the
merger is expected to take at least three years."

It would be more accurate to say that;
"SV-DC is also aware that work to merge
SystemVerilog and Verilog-AMS has started and a draft document is due
for completion at the end of 2011. At that point, the draft is intended to be donated to IEEE for inclusion in the SV standardization process."
 

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