RE: [sv-dc] Draft of SV-DC roadmap

Hi Kevin:

Would you please suggest some specific wording for the power supply
connectivity and back-annotation items?

Thanks,
Scott

> -----Original Message-----
> From: Kevin Cameron [mailto:edaorg@v-ms.com]
> Sent: Monday, September 06, 2010 10:47 PM
> To: Little Scott-B11206
> Cc: sv-dc@eda.org
> Subject: Re: [sv-dc] Draft of SV-DC roadmap
>
>
> I would prefer to see something like "user defined type" used instead
> of
> "real valued". The aim (I think) is to support low level hardware
> modeling in ways that are not currently supported, which would include
> RF modeling with types other than simple real values. SV has a whole
> class type scheme already, seems limiting ourselves to "real valued"
> probably won't simplify much.
>
> Is the "X" and "Z" stuff really a "must"?
>
> Might want to add a "could" or "should" for power supply connectivity,
> and for back-annotation.
>
> Kev.
>
>
> On 09/06/2010 08:01 PM, Little Scott-B11206 wrote:
> > Hi all:
> >
> > I have attached a draft of the SV-DC roadmap. We will discuss this
> in
> > the SV-DC meeting on Wednesday. If you believe that the roadmap
> needs
> > to be changed and would like to discuss it on the list prior to the
> > meeting please send specific suggestions.
> >
> > Thanks,
> > Scott
> >
> >
>

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