[sv-ac] function with side effect use in assertion

I have doubts about below LRM statement. I'm not sure is "shall" used
here means that non-automatic function should trigger an error or does
it only mean that this is not good idea to use such functions in assertion
Expressions are allowed to include function calls, but the following
semantic restrictions are imposed:
--- Functions that appear in expressions shall not contain output or ref
arguments (const ref is
allowed).
--- Functions shall be automatic (or preserve no state information) and
have no side effects.

Summarizing my question is - is below code legal or not:?

module top;
     int k,l;
     function int func1();
         $display(k,l);
         k++;l++;
         return k;
     endfunction

     property p1;
         @(posedge clk) func1()!=3; //func1 has side effect and is not
automatic
     endproperty

     as1:assert property(p1);

     bit clk;
     initial repeat(10) #5 clk=~clk;
endmodule

DANiel

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