RE: [sv-ac] Call to vote. Due August 30

 
SVDB 2205 _X__Yes ___No

http://www.eda-stds.org/mantis/view.php?id=2205

http://www.eda-stds.org/mantis/file_download.php?file_id=4489&type=bug

SVDB 2571 _X__Yes ___No

http://www.eda-stds.org/mantis/view.php?id=2571
<http://www.eda-stds.org/mantis/view.php?id=2571>

http://www.eda-stds.org/mantis/file_download.php?file_id=4414&type=bug

SVDB 3035 ___Yes _X__No

http://www.eda-stds.org/mantis/view.php?id=3035
<http://www.eda-stds.org/mantis/view.php?id=3035>

http://www.eda-stds.org/mantis/file_download.php?file_id=4485&type=bug

John and I discussed this mantis earlier today. I tend to agree with
his thoughts although maybe not as strongly. Part of my problem with
knowing how to vote on this item is understanding why it is important
that the design variables are sampled in a checker. I think that if I
could be given some intuition as to why/when this is important it would
help me understand the "goodness criteria" for the proposed solution. I
do understand that it is related to the fact that checker NBAs occur in
re-NBA, but I haven't thought about the problem long enough to
understand why this causes problems.

One use case I had kicking around in my head is this: I already have
some modeling code and procedural concurrent assertions in a design. I
would like to take those and encapsulate them in a checker for reuse.
How hard is this to do? What issues might I have with sampling?

 I know these are very basic questions with regard to checkers in
general, but it seems like an example along this line might also help
others.

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