[sv-ac] Uploaded proposal for Mantis 0002804

From: Seligman, Erik <erik.seligman@intel.com>
Date: Fri May 14 2010 - 09:26:18 PDT

Hi guys-I uploaded a proposal for this item related to inferring clocks for procedural concurrent assertions, at http://www.verilog.org/mantis/view.php?id=2804 . Please take a look & send comments.

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Received on Fri May 14 09:26:53 2010

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