RE: [sv-ac] Contradictory statement of increment/decrement operators usage.

From: Bresticker, Shalom <shalom.bresticker_at_.....>
Date: Thu Aug 06 2009 - 04:39:28 PDT
I agree that the current text is confusing.

16.6 says,

"There are two places where boolean expressions occur in concurrent assertions:

- In a sequence or property expression"

and sequence_match_item appears inside sequence_expr.

Shalom
________________________________
From: owner-sv-ac@server.eda.org [mailto:owner-sv-ac@server.eda.org] On Behalf Of Havlicek John-R8AAAU
Sent: Thursday, August 06, 2009 2:32 PM
To: Surya Pratik Saha; sv-ac@server.eda.org
Cc: Havlicek John-R8AAAU
Subject: RE: [sv-ac] Contradictory statement of increment/decrement operators usage.

Hi Surya:

The intention is that for boolean expressions that are the building blocks of sequences, the operators with side effects are not allowed (as specified in 16.6.3).  However, for updating local variables in sequence match items, such operators may be used.  This could be clarified with an exception in 16.6.3 for sequence match items.

J.H.

________________________________
From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf Of Surya Pratik Saha
Sent: Wednesday, August 05, 2009 11:43 PM
To: sv-ac@server.eda.org
Subject: [sv-ac] Contradictory statement of increment/decrement operators usage.

Hi,
In SV 2009 draft 7a LRM, it is mentioned:

16.6.3 Operators
All operators that are valid for the types described in 16.6.1 are allowed with the exception of assignment operators and increment and decrement operators. SystemVerilog includes the C assignment operators, such as +=, and the C increment and decrement operators, ++ and --. These operators cannot be used in expressions that appear in assertions. This restriction prevents side effects.

However, BNF of sequence_match_item shows following rules:
sequence_match_item ::=
operator_assignment
| inc_or_dec_expression
| subroutine_call

Are they not contradictory?

--
Regards
Surya
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Received on Thu Aug 6 04:42:25 2009

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