Re: [sv-ac] property instance in property expression

From: soumya <soumya_at_.....>
Date: Mon Dec 22 2008 - 21:51:35 PST
Hi,
 I am sorry for the typo.
correct example is :

property p1;
............
endproperty

property p2;
..................
endproperty

sequence s1;
..............
endsequence

property prop;
@(posedge clk) s1 |-> ((p1) or (p2));
endproperty


Thanks,
-Soumya


John Havlicek wrote:
> Hi Soumya:
>
> Your example is a little confusing because you have two
> declarations of "p1" and no declarations of the referenced
> properties "prop1" and "prop2".  But assuming that you 
> meant to declare "prop1" and "prop2" instead of "p1" and
> "p1", then your code is legal.
>
> I cannot comment on what a specific tool does with this example.
>
> Best regards,
>
> John H.
>
>   
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>> Hi,
>>  I have a quarry regarding usage of property instance in property 
>> expression.
>>
>> Please consider the example.
>>
>> property p1;
>> ............
>> endproperty
>>
>> property p1;
>> ..................
>> endproperty
>>
>> sequence s1;
>> ..............
>> endsequence
>>
>> property prop;
>> @(posedge clk) s1 |-> ((prop1) or (prop2));
>> endproperty
>>
>> One of the simulator giving error massage as :
>> "*Illegal use of property name as a sequence or boolean expression.*"
>>
>> Where as other simulator is simulating successfully.
>>
>> I am confused here .
>>
>> I noticed the BNF of property Expression
>>
>> property_expr ::=
>> | property_expr or property_expr
>> | sequence_expr |-> property_expr
>> | property_instance
>>
>> Please tell me what is the correct behavior.
>>
>> Thanks,
>> -Soumya
>>
>>
>>
>>
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>
>
>   


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Received on Mon Dec 22 21:43:13 2008

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