Adam, Is this actually legal code as is? I thought that the clock inference rules of 16.14.5 (P1800 Draft 5) would make this illegal since there is no "clock" event control on the always block. Gord. Adam Krolnik wrote: > > Good morning; > > As part of this discussion, don't forget assertions in combinatorial > procedural logic. E.g. > > property r3; > @(posedge mclk)(q != d); > endproperty > > always @(*) > begin > if (a) > begin > d2 = d1; > assert property (r3); > ... > end > end > > Since the process above may run more than once, the assertion may need to be stopped > due to the presence of new values that cause it to no longer be triggered. > > > > Thanks. > > -- > Soli Deo Gloria > Adam Krolnik > Director of Design Verification > VeriSilicon Inc. > Plano TX. 75074 > Co-author "Assertion-Based Design", "Creating Assertion-Based IP" > > > -- > This message has been scanned for viruses and > dangerous content by *MailScanner* <http://www.mailscanner.info/>, and is > believed to be clean. -- -------------------------------------------------------------------- Gordon Vreugdenhil 503-685-0808 Model Technology (Mentor Graphics) gordonv@model.com -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Mon May 5 13:18:50 2008
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