Hi Erik, The first example in my 2088 proposal shows a covergroup which is triggered by an (@*posedge* clk) event. If the checker containing this covergroup were placed in a precedural loop, it would be executed only once per clock tick, while all the other assertions will be executed once for every pass of the enclosing loop. This will be a little non-intuitive for new users, so it probably should be explained in the text. The second example in the 2088 proposal shows a covergroup which is triggered by a call to the default *sample()* method. The third example might be the most useful. This shows a covergroup triggered by a custom *sample()* method. It should be easy to modify this example so it could be placed in a loop. *checker* op_test (*logic* clk, vld_1, vld_2, *logic* [3:0] opcode) * checkvar* *bit* [3:0] opcode_d1; * always_check* @(*posedge* clk) opcode_d1 <= opcode; * covergroup* cg_op *with* *function* sample(*bit* [3:0] opcode_d1); cp_op : * coverpoint* opcode_d1; * endgroup*:cg_op cg_op cg_op_1 = *new*(); * sequence* op_accept; @(*posedge* clk) vld_1 ##1 (vld2, cg_op_1.sample(opcode_d1)); * endsequence* *endchecker* Suppose the above checker is placed in a loop where vld1 and vld2 are bits of arrays, and opcode is a slice of a two-dimensional array. The checker portion could be written like this (I'll take out vld2 to avoid the procedural code in the checker). *checker* op_test (*logic* clk, vld_1, *logic* [3:0] opcode) * checkvar* *bit* [3:0] opcode_d1; * covergroup* cg_op *with* *function* sample(*bit* [3:0] opcode_d1); cp_op : * coverpoint* opcode_d1; * endgroup*:cg_op cg_op cg_op_1 = *new*(); * sequence* op_accept; @(*posedge* clk) (vld1, cg_op_1.sample(opcode)); * endsequence* *endchecker * *... logic [3:0] valid; logic [3:0] opcodes [0:3]; * *for (i=0; i<=3; i++) begin op_test my_op_test (.clk(clk), .vld1(valid[i]), .opcode(opcodes[i])); end * Does this help? Tom Seligman, Erik wrote: > Tom-- can you send me a short fragment giving an example of what you > were alluding to in the meeting? > I couldn't find something like this in 2088, or in the current LRM. > > Thanks! > > > > *Erik Seligman* > > ***Formal Verification Architect* > > *Corporate Design Solutions* > *Design Technology and Solutions* > > *Intel Corporation* > > M.S. JF4-402 > 2111 NE 25^th Ave > Hillsboro, OR 97124 > > Phone: (503) 712-3134 > > -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Tue Feb 5 13:22:55 2008
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