Re: [sv-ac] Q: verification statements

Hi,

That part (16.14) seems inconsistent w.r.t. to terminology: The heading
reads "Concurrent assertions". The first paragraph talks about
"verification statement", whereas the second paragraph again talks about
"concurrent assertion statement". Are these two terms meant to refer to
the same thing? In that case why not settle for one of them? I
personally prefer "verification statement" since it seems strange to
group assumes and covers under "concurrent assertions".

Regards,

Johan M


On Thu, Oct 18, 2007 at 10:08:38PM +0200, Bresticker, Shalom wrote:
> That term is defined at the beginning of 16.14. See also Mantis 1987.
> 
> Shalom 
> 
> > -----Original Message-----
> > From: owner-sv-ac@server.eda.org 
> > [mailto:owner-sv-ac@server.eda.org] On Behalf Of Seligman, Erik
> > Sent: Thursday, October 18, 2007 9:51 PM
> > To: sv-ac@server.eda.org
> > Subject: [sv-ac] Q: verification statements
> > 
> >  
> > I've reviewed 1995 (concurrent assertions in loops) vs 1737 
> > (fixing some language in 16.14.5).  They don't touch the same 
> > part of the text, but I had a question about some phrasing 
> > that I may need to sync up 1995 with.
> > 
> > 1737 uses the term "verification statements".  I forget, did 
> > we agree that this is the best general term describing 
> > assert, assume, and cover statements?  In that case, rather 
> > than phrasing 1995 as "concurrent assertions" in loops, I 
> > should probably modify the phrasing to "concurrent 
> > verification statements".
> > 
> > But do we also need to change the title of section 16.14.5?  
> > Right now it's "Embedding concurrent assertions in procedural code".
> > 
> > --
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