RE: [sv-ac] Q: verification statements

From: Bresticker, Shalom <shalom.bresticker_at_.....>
Date: Thu Oct 18 2007 - 13:08:38 PDT
That term is defined at the beginning of 16.14. See also Mantis 1987.

Shalom 

> -----Original Message-----
> From: owner-sv-ac@server.eda.org 
> [mailto:owner-sv-ac@server.eda.org] On Behalf Of Seligman, Erik
> Sent: Thursday, October 18, 2007 9:51 PM
> To: sv-ac@server.eda.org
> Subject: [sv-ac] Q: verification statements
> 
>  
> I've reviewed 1995 (concurrent assertions in loops) vs 1737 
> (fixing some language in 16.14.5).  They don't touch the same 
> part of the text, but I had a question about some phrasing 
> that I may need to sync up 1995 with.
> 
> 1737 uses the term "verification statements".  I forget, did 
> we agree that this is the best general term describing 
> assert, assume, and cover statements?  In that case, rather 
> than phrasing 1995 as "concurrent assertions" in loops, I 
> should probably modify the phrasing to "concurrent 
> verification statements".
> 
> But do we also need to change the title of section 16.14.5?  
> Right now it's "Embedding concurrent assertions in procedural code".
> 
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Received on Thu Oct 18 13:09:57 2007

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