RE: [sv-ac] Manits 1758: Boolean Implication and Equivalelnce

From: Korchemny, Dmitry <dmitry.korchemny_at_.....>
Date: Mon Oct 08 2007 - 11:33:36 PDT
Hi Ed,

On the page 3 two lines need to be joined:

"The logical implication expression1 -> expression2 is a shorthand for
writing (!expression1 || expression2),"

and

" and the logical equivalence expression1 <-> expression2 is a shorthand
for writing ((expression1 -> expression2) && (expression2 ->
expression1))."

Thanks,
Dmitry

-----Original Message-----
From: owner-sv-ac@server.eda.org [mailto:owner-sv-ac@server.eda.org] On
Behalf Of Eduard Cerny
Sent: Monday, October 08, 2007 2:17 PM
To: sv-ac@server.eda-stds.org
Subject: [sv-ac] Manits 1758: Boolean Implication and Equivalelnce

Hello,

I have uploaded an updated proposal following Shalom's recommendations.
Also attached here.

Best regards,
ed

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Received on Mon Oct 8 11:34:24 2007

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