>However, any construct within a checker should be defined as non-synthesizable, >and won't result in extra hardware in the design. I don't think it's appropriate for this language standard to say anything about what may or may not be synthesized. Also, why wouldn't users want synthesized checkers in their FPGA-accelerated test benches? [In reply to http://www.eda-stds.org/sv-ac/hm/4363.html .] -- Brad -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Tue Jul 24 14:40:53 2007
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