RE: [sv-ac] P1800 - constant primary as delay in ## : Mantis 1901

 
Brad, however, constant_minTypmax_expression also allows 3 constants
which are not allowed in the delay.  Perhaps it might be better to state
it as:

cycle_delay_range ::=
	  ## constant_expression
	| ## ( constant_expression )
	| ## [ cycle_delay_const_range_expression ]

Would you agree?

Thanks,
ed


> -----Original Message-----
> From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On 
> Behalf Of Eduard Cerny
> Sent: Tuesday, June 26, 2007 9:11 PM
> To: Brad Pierce; sv-ac@eda-stds.org
> Subject: RE: [sv-ac] P1800 - constant primary as delay in ## 
> : Mantis 1901
> 
> In that case yes, it can be easily changed.
> ed
>  
> 
> > -----Original Message-----
> > From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On 
> > Behalf Of Brad Pierce
> > Sent: Tuesday, June 26, 2007 5:36 PM
> > To: sv-ac@eda-stds.org
> > Subject: RE: [sv-ac] P1800 - constant primary as delay in ## 
> > : Mantis 1901
> > 
> > The cycle_delay production that is used in 
> > procedural_timing_control and
> > clocking_drive is independent of the cycle_delay_range 
> production used
> > in sequence_expr.
> > 
> > -- Brad
> > 
> > -----Original Message-----
> > From: Eduard Cerny [mailto:edcerny@synopsys.COM] 
> > Sent: Tuesday, June 26, 2007 2:07 PM
> > To: Brad Pierce; sv-ac@eda-stds.org
> > Subject: RE: [sv-ac] P1800 - constant primary as delay in 
> ## : Mantis
> > 1901
> > 
> > Brad,
> > 
> > I think that ## can also be a cycle delay in procedural 
> code and there
> > it is not restricted to a constant primary. This is why I did 
> > not change
> > the syntax but added a constraint. Is that a good reason or I missed
> > something?
> > 
> > Thanks,
> > 
> > ed
> >  
> > 
> > > -----Original Message-----
> > > From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On 
> Behalf Of 
> > > Brad Pierce
> > > Sent: Tuesday, June 26, 2007 4:36 PM
> > > To: sv-ac@eda-stds.org
> > > Subject: Re: [sv-ac] P1800 - constant primary as delay in ##
> > > : Mantis 1901
> > > 
> > > Ed,
> > > 
> > > Why not just allow any constant_primary after ##?
> > > 
> > > Then the rule for cycle_delay_range could be simplified to
> > > 
> > >  cycle_delay_range ::=
> > >        ## constant_primary
> > >      | ## [ cycle_delay_const_range_expression ]
> > > 
> > > plus a footnote that in a cycle_delay_range it shall be 
> > illegal for a 
> > > constant_primary not to evaluate to a nonnegative integer?
> > > 
> > > Recall that
> > > 
> > >      constant_primary ::= ( constant_mintypmax_expression )
> > >                       ::= ( constant_expression )
> > > 
> > > -- Brad
> > > 
> > > -----Original Message-----
> > > From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On 
> Behalf Of 
> > > Eduard Cerny
> > > Sent: Tuesday, June 26, 2007 11:31 AM
> > > To: sv-ac@eda-stds.org
> > > Subject: [sv-ac] P1800 - constant primary as delay in ## : 
> > Mantis 1901
> > > 
> > > Hi,
> > > 
> > > I have created a new mantis entry, 1901, and also attached 
> > a proposal.
> > > 
> > > Best regards,
> > > ed
> > > 
> > > --
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