RE: [sv-ac] Question on clock flow

Hello John,

thanks. Perhaps the LRM should be a little more clear on that, perhaps
define how it flows in different situations. The confusing [art is the
word "distributes" over and, or, ..

Best regards,
ed
 

> -----Original Message-----
> From: John Havlicek [mailto:john.havlicek@freescale.com] 
> Sent: Friday, May 11, 2007 10:06 AM
> To: Eduard.Cerny@synopsys.COM
> Cc: sv-ac@eda-stds.org
> Subject: Re: [sv-ac] Question on clock flow
> 
> Hi Ed:
> 
> My interpretation is (B).  You will get (A) from
> 
>    @c (@d x) and y
> 
> J.H.
> 
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> > Thread-Topic: Question on clock flow
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> > From: "Eduard Cerny" <Eduard.Cerny@synopsys.com>
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> > 
> > Hi,
> > 
> > What is your interpretation of the clock flow in the LRM on the
> > following example:
> > 
> > Question here to answer is what does @c (@d x and y) mean? A or B ?
> > ------------------------------------
> > (A) (@d x) and (@c y) 
> > (B) (@d x) and (@d y) 
> > 
> > -------
> > 
> > Thanks,
> > 
> > ed
> > 
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