RE: [sv-ac] question on $past

There is already a Mantis item which says something lile that it is the
default value of the type.
ed


________________________________

	From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf
Of Lisa Piper
	Sent: Thursday, April 26, 2007 8:44 PM
	To: sv-ac@eda-stds.org
	Subject: [sv-ac] question on $past
	
	

	I have a question - The SV LRM IEEE-1800 section 17.7.3 says:

	 

	"If the specified clock tick in the past is before the start of
simulation, the returned value from the $past function is a value of X."

	 

	What about things that are not 4-state variables in
SystemVerilog?  What value should be returned?

	 

	Lisa


	-- 
	This message has been scanned for viruses and 
	dangerous content by MailScanner <http://www.mailscanner.info/>
, and is 
	believed to be clean. 


-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.