While the LRM does not require always_ff for FFs, that does not mean that clock/reset inference needs to support other methods. As for the superfluous sentence, while it does not state a mandatory requirement, it does suggest a desirable behavior, so the sentence does have a benefit. Shalom > The LRM (11.4) says -- > > "The SystemVerilog always_ff procedure CAN be used to model > synthesizable sequential logic behavior." > > It doesn't say always_ff SHALL be used for this purpose. > > And the following LRM sentence is superfluous -- > > "Software tools can perform additional checks to warn > if the behavior within an always_ff procedure > does not represent sequential logic." > > Software tools can always perform additional checks to warn about > anything. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Mon Mar 12 02:07:29 2007
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