RE: [sv-ac] reminder to vote on mantis 1550

From: Eduard Cerny <Eduard.Cerny_at_.....>
Date: Thu Jan 25 2007 - 07:44:33 PST
They can use, suppose clock is by default X or 0 and in initial block it
is set to 1, there is a posedge at time 0.
ed 

> -----Original Message-----
> From: Doron Bustan [mailto:dbustan@freescale.com] 
> Sent: Thursday, January 25, 2007 10:12 AM
> To: Eduard Cerny
> Cc: Miller Hillel-R53776; Havlicek John-r8aaau; sv-ac@eda-stds.org
> Subject: Re: [sv-ac] reminder to vote on mantis 1550
> 
> Thinking again, it should not be a problem for assertions that are
> clocked on an edge of a clock (they never use sampled value 
> of time 0.)
> The only assertion that will use these values is of the form assert 
> property (@(1)...).
> So, I am fine with that.
> 
> Hillel,
> considering that fact that most monitors respond to a clock edge,
> and thus do not use the sample values of time 0, do  you still see
> an issue here?
> 
> Doron
> 
> 
> Eduard Cerny wrote:
> 
> >I think that values assigned in initial blocks should not be 
> used as the
> >sampled value. that assignment happens at time 0+.  The default or
> >declaration assigned value should be used.
> >
> >ed
> > 
> >
> >  
> >
> >>-----Original Message-----
> >>From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On 
> >>Behalf Of Doron Bustan
> >>Sent: Thursday, January 25, 2007 9:40 AM
> >>To: Miller Hillel-R53776
> >>Cc: Havlicek John-r8aaau; sv-ac@eda-stds.org
> >>Subject: Re: [sv-ac] reminder to vote on mantis 1550
> >>
> >>That rise another issue that I was not aware of.
> >>Since assertions use sampled values, it means that on time 0
> >>they use the default variables values, even if they are assigned
> >>to different values in initial blocks. Is that what we want?
> >>
> >>Doron
> >>
> >>Miller Hillel-R53776 wrote:
> >>
> >>    
> >>
> >>>John,
> >>>
> >>>I am not sure we should make such an inconsistency it sounds 
> >>>      
> >>>
> >>troubling.
> >>    
> >>
> >>>However, the reason why static variable declarartion 
> >>>      
> >>>
> >>assignments cannot
> >>    
> >>
> >>>be used, is that it cannot be used by an outer module 
> reference. If I
> >>>want to influence the initial value of a $ function that is 
> >>>      
> >>>
> >>dependent on
> >>    
> >>
> >>>a module's reg, how would this be done. Would I need to 
> >>>      
> >>>
> >>rewrite the code
> >>    
> >>
> >>>with the declaration assignment?
> >>>
> >>>Maybe we need an additional construct for initializing the $sampled
> >>>value of a variable at the same time as assignment declaration.
> >>>
> >>>Thanks
> >>>
> >>>
> >>>
> >>>
> >>>
> >>>Hillel Miller>
> >>>
> >>>
> >>>-----Original Message-----
> >>>From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On 
> >>>      
> >>>
> >>Behalf Of John
> >>    
> >>
> >>>Havlicek
> >>>Sent: Thursday, January 25, 2007 3:42 AM
> >>>To: sv-ac@eda-stds.org
> >>>Subject: Re: [sv-ac] reminder to vote on mantis 1550
> >>>
> >>>Hillel & Ed:
> >>>
> >>>I think there are several things going on here.
> >>>
> >>>First, based on 9.3.1, I think that the declaration assignments for
> >>>static variables execute as part of 
> >>>
> >>>  initialize the values of all nets and variables
> >>>
> >>>Then the initialization events are scheduled into the time 0 slot.
> >>>This does not mean that any assignments from an initial block are
> >>>performed yet.  
> >>>
> >>>Then, assuming that there is some event, we execute the 
> time 0 slot.
> >>>
> >>>Then the preponed region of the time 0 slot is executed.
> >>>
> >>>Thus, the declaration assignments for static variables 
> will influence
> >>>the preponed values in the time 0 slot.
> >>>
> >>>If $sampled refers to a static variable with declaration 
> assignment,
> >>>then I think that in the time 0 slot the value from the declaration
> >>>assignment should be used rather than the default initial 
> >>>      
> >>>
> >>value for the
> >>    
> >>
> >>>type of the variable.  
> >>>
> >>>The statement in the proposal that $sampled returns the 
> >>>      
> >>>
> >>default intial
> >>    
> >>
> >>>value (presumably of the type) of its argument in the time 0 
> >>>      
> >>>
> >>slot could
> >>    
> >>
> >>>therefore be inconsistent with the statement that $sampled 
> >>>      
> >>>
> >>returns the
> >>    
> >>
> >>>preponed value of its argument in the current time slot, and should
> >>>probably either be removed or clarified.
> >>>
> >>>I think that according to 9.3.1, assignments in an initial 
> >>>      
> >>>
> >>block will be
> >>    
> >>
> >>>scheduled for the active region of the time 0 slot.  These 
> >>>      
> >>>
> >>assignments
> >>    
> >>
> >>>do not, I believe, affect the preponed values in the time 0 
> >>>      
> >>>
> >>slot.  If we
> >>    
> >>
> >>>consider $sampled always to return the preponed value, then initial
> >>>block assignments will not affect $sampled in the time 0 slot.
> >>>
> >>>Hillel, are you asking for the defintion of $sampled to be 
> >>>      
> >>>
> >>influenced by
> >>    
> >>
> >>>initial block assignments in the time 0 slot?  If so, then the
> >>>definition of $sampled needs to be changed to distinguish 
> the time 0
> >>>slot from all the other time slots.  I would like to see a strong
> >>>rationale for such an inconsistency, one that explains, 
> >>>      
> >>>
> >>e.g., why static
> >>    
> >>
> >>>variables with declaration assignments cannot be used.
> >>>
> >>>Best regards,
> >>>
> >>>John H.
> >>>
> >>> 
> >>>
> >>>      
> >>>
> >>>>Content-class: urn:content-classes:message
> >>>>X-MimeOLE: Produced By Microsoft Exchange V6.5
> >>>>X-OriginalArrivalTime: 24 Jan 2007 18:30:41.0689 (UTC) 
> >>>>FILETIME=[C0BB0090:01C73FE5]
> >>>>Date: Wed, 24 Jan 2007 11:30:36 -0700
> >>>>X-MS-Has-Attach: 
> >>>>X-MS-TNEF-Correlator: 
> >>>>Thread-Topic: [sv-ac] reminder to vote on mantis 1550
> >>>>Thread-Index: 
> >>>>Acc/JcA24JDBTV1VQc2QjprTXfKfWwAlgkfgAAIJ6XAAA6aw4AAEm8jwAAAfAlA=
> >>>>From: "Miller Hillel-R53776" <r53776@freescale.com>
> >>>>
> >>>>This is a multi-part message in MIME format.
> >>>>
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> >>>>
> >>>>Still what is wrong with the proposal to use the value after 
> >>>>initialization at time 0? Where does this break consistency?
> >>>>
> >>>>________________________________
> >>>>
> >>>>From: Eduard Cerny [mailto:Eduard.Cerny@synopsys.com]=20
> >>>>Sent: Wednesday, January 24, 2007 8:27 PM
> >>>>To: Miller Hillel-R53776; Eduard Cerny; Havlicek John-r8aaau; 
> >>>>sv-ac@eda-stds.org
> >>>>Subject: RE: [sv-ac] reminder to vote on mantis 1550
> >>>>
> >>>>
> >>>>Hi Hillel,
> >>>>=20
> >>>>apart from the uesr initialization, what is really the 
> problem with 
> >>>>the current definition? Yes, it can happen when there is 
> a clocking 
> >>>>event at time 0, or if you have $past with longer number of 
> >>>>        
> >>>>
> >>clocks to 
> >>    
> >>
> >>>>go back, etc.
> >>>>=20
> >>>>Best regards,
> >>>>ed
> >>>>=20
> >>>>PS the forced initialization can be a feature of a tool, 
> >>>>        
> >>>>
> >>not the LRM.
> >>    
> >>
> >>>>=20
> >>>>
> >>>>
> >>>>________________________________
> >>>>
> >>>>	From: Miller Hillel-R53776 [mailto:r53776@freescale.com]=20
> >>>>	Sent: Wednesday, January 24, 2007 1:14 PM
> >>>>	To: Eduard Cerny; Havlicek John-r8aaau; sv-ac@eda-stds.org
> >>>>	Subject: RE: [sv-ac] reminder to vote on mantis 1550
> >>>>=09
> >>>>=09
> >>>>	Ed,
> >>>>	=20
> >>>>	What $ functions use $sampled values which are to be before time
> >>>>   
> >>>>
> >>>>        
> >>>>
> >>>0?
> >>> 
> >>>
> >>>      
> >>>
> >>>>	=20
> >>>>	Does this happen when there is a "clocking event" at time
> >>>>   
> >>>>
> >>>>        
> >>>>
> >>>zero?=20
> >>> 
> >>>
> >>>      
> >>>
> >>>>	=20
> >>>>	Why can't we take the route of using the values after
> >>>>   
> >>>>
> >>>>        
> >>>>
> >>>initialization 
> >>> 
> >>>
> >>>      
> >>>
> >>>>as the $sampled value in the first preponed region at 
> time 0? What 
> >>>>does this break?
> >>>>	=20
> >>>>	There also needs to be away to allow the user to control the 
> >>>>initialization of the $functions at time Zero. This could 
> >>>>        
> >>>>
> >>be needed if
> >>    
> >>
> >>>>   
> >>>>
> >>>>        
> >>>>
> >>> 
> >>>
> >>>      
> >>>
> >>>>a counter example is produced by a formal tool that needs to be 
> >>>>replayed in simulation. If the $sampled at the first 
> >>>>        
> >>>>
> >>preponed region 
> >>    
> >>
> >>>>is from the time 0 initilization stage then this is doable.
> >>>>	=20
> >>>>	Thanks
> >>>>	Hillel
> >>>>	=20
> >>>>	=20
> >>>>	=20
> >>>>________________________________
> >>>>
> >>>>	From: Eduard Cerny [mailto:Eduard.Cerny@synopsys.com]=20
> >>>>	Sent: Wednesday, January 24, 2007 4:31 PM
> >>>>	To: Miller Hillel-R53776; Havlicek John-r8aaau;
> >>>>   
> >>>>
> >>>>        
> >>>>
> >>>sv-ac@eda-stds.org
> >>> 
> >>>
> >>>      
> >>>
> >>>>	Subject: RE: [sv-ac] reminder to vote on mantis 1550
> >>>>=09
> >>>>=09
> >>>>	Hello Hillel,
> >>>>	But the functions use $sampled values which are to be before
> >>>>   
> >>>>
> >>>>        
> >>>>
> >>>time 0. 
> >>> 
> >>>
> >>>      
> >>>
> >>>>Hence the initialization to the default value of the type. 
> >>>>        
> >>>>
> >>What else 
> >>    
> >>
> >>>>would you suggest?ed
> >>>>	=20
> >>>>
> >>>>
> >>>>________________________________
> >>>>
> >>>>		From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org]
> >>>>   
> >>>>
> >>>>        
> >>>>
> >>>On Behalf Of 
> >>> 
> >>>
> >>>      
> >>>
> >>>>Miller Hillel-R53776
> >>>>		Sent: Wednesday, January 24, 2007 8:53 AM
> >>>>		To: Havlicek John-r8aaau; sv-ac@eda-stds.org
> >>>>		Subject: RE: [sv-ac] reminder to vote on mantis 1550
> >>>>	=09
> >>>>	=09
> >>>>
> >>>>		Hi,
> >>>>
> >>>>		I vote no even though I am not elligible. The reason is
> >>>>   
> >>>>
> >>>>        
> >>>>
> >>>that it is 
> >>> 
> >>>
> >>>      
> >>>
> >>>>not clear what the intialized values are of the $ functions.
> >>>>
> >>>>		The current schedular code shows an initialization
> >>>>   
> >>>>
> >>>>        
> >>>>
> >>>process, before 
> >>> 
> >>>
> >>>      
> >>>
> >>>>going into the first preponed area (see below). This 
> means that the 
> >>>>initial value of an expression is determined by its 
> >>>>        
> >>>>
> >>initilization at 
> >>    
> >>
> >>>>time slot 0 and not by its default type value as specified in the 
> >>>>proposal.
> >>>>
> >>>>		execute_simulation {
> >>>>
> >>>>		T =3D 0;
> >>>>
> >>>>		initialize the values of all nets and variables;
> >>>>
> >>>>		schedule all initialization events into time 0 slot;
> >>>>
> >>>>		while (some time slot is nonempty) {
> >>>>
> >>>>		move to the next future nonempty time slot and set T;=20
> >>>>
> >>>>		execute_time_slot (T);
> >>>>
> >>>>		}
> >>>>
> >>>>		}
> >>>>
> >>>>		Hillel Miller>
> >>>>
> >>>>
> >>>>   
> >>>>
> >>>>        
> >>>>
> >>>--
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> >>>
> >>> 
> >>>
> >>>      
> >>>
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> >>    
> >>
> >
> >  
> >
> 
> 

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Received on Thu Jan 25 07:45:39 2007

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