Doron, My understanding is below: sequence s1; ((a[*2] , $display("aa")) #1 a) intersect b[*3]; endsequence At the the second "a", the endpoint of the sequence a[*2] and regardless of combinations of "aa", the $display should be executed. "In other cases it is not clear how many times a subroutine should be called in a given cycle. For example in the sequence sequence s2; ( (a #1 a) or (b #1 b) ) #1 (c, $display("c")); endsequence In case that a,b, and c are high at the first 3 cycles, it is not clear how many times the $display should be executed. " Same thing here, at then endpoint of "( (a #1 a) or (b #1 b) ) #1 ", when "c" is reached , and regardless of the value of "a" or "b", the $display should be executed. In the above example, a user would want to put such subroutines in the consequent rather than the antecedent. Any disagreement to my opinions? ------------------------------------------------------------------------- - Ben Cohen Trainer, Consultant, Publisher (310) 721-4830 http://www.vhdlcohen.com/ ben_ f rom _abv-sva.org * Co-Author: SystemVerilog Assertions Handbook, 2005 ISBN 0-9705394-7-9 * Co-Author: Using PSL/SUGAR for Formal and Dynamic Verification 2nd Edition, 2004, ISBN 0-9705394-6-0 * Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn 0-9705394-2-8 * Component Design by Example ", 2001 isbn 0-9705394-0-1 * VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1 * VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115 ------------------------------------------------------------------------- --------Received on Mon Oct 31 09:02:16 2005
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