Subject: Re: [sv-ac] Alternative proposal for NBA assignment
From: Surrendra Dudani (Surrendra.Dudani@synopsys.com)
Date: Fri Nov 14 2003 - 12:52:08 PST
Hi Adam,
Thanks for the review. Please see comments.
Surrendra
At 10:05 AM 11/14/2003 -0600, you wrote:
>Hi Surrendra;
>
>Reading the sections I have some comments.
>
>In section 1.1.1, I think it would be good to have a waveform picture showing
>the values of reg1, a, b and clk. This would ensure that everyone understands
>the functionality. One may even want to include a waveform for $rose(b).
I agree.
>In section 1.1.3, you write,
>
> "s1.triggered is true in the simulation time unit after the observe
> region in
> which the sequence match occurs. S1.triggered gets reset to false in the
> next simulation time unit."
>
>The phrase "simulation time unit after the observe region" is referring to the
>reactive region, correct?
That's right.
>This above sentence and restated as the third bullet in the next paragraph
>means
>that the method "triggered" only works for the reactive region.
That is true for .triggered on sequences.
>I do not understand why you are only considering program block code in
>trying to
>fulfil this functionality need. I do not accept as reasonable the code
>fragment
>to switch to the reactive region.
>
>[Actually, if this is acceptable by everyone else, then we could rewrite
>the action
>block to execute in the active region and use this trick to switch to the
>reactive
>region when one desires.]
>
>I propose that we extend the value of the method "triggered" to be active
>for one
>full clocking cycle - observed .. next clock observed region. This allows one
>to write verilog code executing in the active region to be utilized for
>modeling
>code.
We could, but .triggered on sequences would behave differently than
.triggered on events. I agree that modeling using .ended functionality in a
module is by a round-about way.
>What would happen if I wrote:
>
>forever
>L3: @(posedge clk) sig3 <= sig4 & s.ended;
>
>We should explain this as it is not defined anywhere what would occur.
Currently, .ended and .matched is not allowed outside of assertions.
> Thanks.
>
> Adam Krolnik
> Verification Mgr.
> LSI Logic Corp.
>
>
>
**********************************************
Surrendra A. Dudani
Synopsys, Inc.
377 Simarano Drive, Suite 300
Marlboro, MA 01752
Tel: 508-263-8072
Fax: 508-263-8123
email: Surrendra.Dudani@synopsys.com
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