Subject: RE: [sv-ac] Add assertion to Section 1 SV 3.1 improvement list?
From: David W. Smith (david.smith@synopsys.com)
Date: Mon Apr 21 2003 - 13:32:43 PDT
Changed in LRM-303 with concurrence from Surrendra.
Regards
David
David W. Smith
Synopsys Scientist
Synopsys, Inc.
Synopsys Technology Park
2025 NW Cornelius Pass Road
Hillsboro, OR 97124
Voice: 503.547.6467
Main: 503.547.6000
FAX: 503.547.6906
Email: david.smith@synopsys.com
http://www.synopsys.com
-----Original Message-----
From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf Of Adam
Krolnik
Sent: Monday, April 21, 2003 11:11 AM
To: sv-ac@eda.org
Subject: [sv-ac] Add assertion to Section 1 SV 3.1 improvement list?
All,
I would suggest we introduce assertions in the improvement list.
Proposal as follows:
Section 1, page 2.
- Assertion mechanism for verifying design intent and functional
coverage intent.
- Property and sequence declarations
- Assertions and Coverage statements with action blocks.
Adam Krolnik
Verification Mgr.
LSI Logic Corp.
Plano TX. 75074
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