Re: [sv-ac] SVAC Meeting minutes 3/20/03


Subject: Re: [sv-ac] SVAC Meeting minutes 3/20/03
From: Stephen Meier (Stephen.Meier@synopsys.com)
Date: Fri Mar 21 2003 - 09:06:55 PST


Hi:

My understanding is that syntax group is looking to address this and
if not then DWG will work to address it.

Steve
---------
At 09:55 AM 3/21/2003 -0600, John Havlicek wrote:

>All:
>
>I agree with Erich 100% on this issue. We should not use the syntax
>"*=[n]" in SVA for the same operator that is written as "[=n]" in PSL.
>
>John H.
>
> >
> >
> > Steve,
> >
> > Regarding this item in the minutes:
> >
> > =========
> > Item 19: Addition of explicit operator for next event
> >
> > Adam asked if the nonconsecutive repetition ( *=) provided the same
> functionality. Surrendra indicated that it does. With this fact it was
> agreed to withdraw this item based on fact that there is no justification
> to have two ways to express same thing.
> > =========
> >
> > If I understand the minutes correctly (and unfortunately I was delayed
> yesterday and could not join the meeting until after this was discussed),
> I agree with the decision. But I'd also like to point out to the
> SV-ACthat this is a case in which the syntax for SVA clashes with the
> syntax for PSL, and we should do something to correct this situation.
> >
> > Specifically, PSL has two "nonconsecutive" repetition operators:
> >
> > for N, which is either a number or a range:
> >
> > b[=N] matches any string that has N occurrences of b anywhere
> within it
> >
> > b[->N] matches any string that ENDS in the Nth occurrence of b
> > (and b[->] is shorthand for b[->1])
> >
> > Note that both operators are very useful. The first operator is useful
> for counting occurrences of some condition in parallel with some other
> behavior (e.g., Seq1 'intersect' Cond[=0:n] ). The second operator is
> useful as the 'next_event', or more generally the 'nth_event' operator
> (e.g., the sequence A; B[->3]; C means "look for A, then look for the 3rd
> occurrence of B, then look for C").
> >
> > SVA has used syntax similar to the first operator to express the
> semantics of the second operator. This will potentially confuse users.
> >
> > A proposal has been made to the DWG to adopt both operators in SVA, and
> to align their syntax with that of PSL to avoid confusion (either using
> the same operators as PSL, or using alternative operators that are
> different from PSL but clearly correspond with the semantically
> equivalent PSL operator).
> >
> > Regards,
> >
> > Erich
> >
> >
> > -------------------------------------------
> > Erich Marschner, Cadence Design Systems
> > Senior Architect, Advanced Verification
> > Phone: +1 410 750 6995 Email: erichm@cadence.com
> > Vmail: +1 410 872 4369 Email: erichm@comcast.net
> >
> > | -----Original Message-----
> > | From: Stephen Meier [mailto:Stephen.Meier@synopsys.com]
> > | Sent: Friday, March 21, 2003 1:40 AM
> > | To: System Verilog Assertion
> > | Subject: [sv-ac] SVAC Meeting minutes 3/20/03
> > |
> > |
> > | Hi:
> > |
> > | Here are minutes from today.
> > |
> > | -Steve
> > |
> > | Steve Meier (stephen.meier@synopsys.com) W: 650-584-4476,
> > | Cell: 408-393-8246
> > |

Steve Meier (stephen.meier@synopsys.com) W: 650-584-4476, Cell: 408-393-8246



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