Re: [sv-ac] sequence delay syntax


Subject: Re: [sv-ac] sequence delay syntax
From: Adam Krolnik (krolnik@lsil.com)
Date: Wed Feb 05 2003 - 11:33:08 PST


Hi Surrendra;

It is difficult to fully evaluate your proposal:

1. You have compressed three productions (sequence_expr, seqeuence_phrase,
    and sequence element) into one.

2. You have not included everything into the production,
     " | <other sequence construct>"

Regarding removal of unary delay;

Here are some examples from 0.79:

([0] a) ==> a
([1] a) ==> true; a
([0:3] a) ==> (a) or (true;a) or (true;true;a) or (true;true;true;a)

0.79 also states,

"A ';' followed by an optional range specifies that the sequence_expr should occur later
than the current cycle. ... A range of [0] specifies that the next element should occur
in parallel with the current cycle."

Without unary delay, I would recode these as (using 1 instead of true):

([0] a) ==> 1;[0] a
([1] a) ==> 1; a
([0:3] a) ==> 1;[0:3] a

Is this correct?

    THanks.

    Adam Krolnik
    Verification Mgr.
    LSI Logic Corp.
    Plano TX. 75074



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