The SystemVerilog Discrete (analog) modeling Committee (SV-DC) is responsible for adding support for user defined types to SV which will include support for types like "wreal".

Topic attachments
I Attachment Action Size Date Who Comment
PDFpdf 3398-alt.pdf manage 109.1 K 2011-05-17 - 06:59 KevinCameron Alternative user-defined types on nets proposal
Topic revision: r1 - 2011-05-17 - 07:01:12 - KevinCameron
 
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