The P1778 Project Authorization Request (PAR) is available from ieee website IEEE P1778 PAR.

Scope

This standard is a Reference Manual for the Esterel v7 Language, which is dedicated to the specification and implementation of hardware or software reactive systems. The standard ensures unambiguous definition of the language syntax and semantics, and, therefore, full interoperability between Esterel-based software compilation, circuit synthesis, static analysis, and verification tools.

Purpose

The purpose of this standard is to provide the Electronic Design Automation, Semiconductor, Systems Design, and Software communities with a well-defined and official IEEE definition of the Esterel v7 language.

Esterel v7 is not a minor variant of existing HDLs or software languages that could be defined with an addendum to existing standards. Esterel v7 is unique in its way to formally merge the kind of sequencing only found in software languages, the kind of large-scale synchronous concurrency found in hardware description languages, specific temporal control primitives that drive the life and death of activities, and full support for multiclock designs. For datapath specification, Esterel v7 supports formally defined arbitrary precision exact arithmetic, bitvectors with conversion from and to numbers according to predefined or user-defined numerical encodings, and arrays of arbitrary dimensions and types. Esterel v7 is interoperable with other standards since it can generate synthesizable HDL code (Verilog, VHDL, etc.) as well as executable software code (C, C++, !!SystemC, etc.).


This topic: P1778 > ScopeAndPurpose
Topic revision: r2 - 2008-09-24 - 12:46:05 - SylvanDissoubray
 
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