Hi All, I was seeking a clarification regarding the behavior of a VHDL-AMS simultaneous statement during frequency analysis. Any help is greatly appreciated. Consider the following source model - this model is similar to the one in the "The System Designer's Guide to VHDL-AMS" by Peter Ashenden (pp 407). LIBRARY IEEE; USE IEEE.MATH_REAL.MATH_2_PI; USE IEEE.ELECTRICAL_SYSTEMS.ALL; ENTITY E IS PORT (QUANTITY DC : IN VOLTAGE := 1.0; QUANTITY AC_MAG : IN VOLTAGE := 1.0; QUANTITY AC_PHASE : IN ANGLE := 0.0; TERMINAL p,m: ELECTRICAL); END ENTITY E; ARCHITECTURE behav OF E IS QUANTITY v ACROSS i THROUGH p TO m; QUANTITY ac_spec : real SPECTRUM AC_MAG, MATH_2_PI*AC_PHASE/360.0; BEGIN IF (domain = quiescent_domain) OR (domain = time_domain) USE v == DC; ELSE v == ac_spec; END USE; END ARCHITECTURE behav; My question is - Why is the if-use required at all? Wouldn't the same effect be achieved by using the following simultaneous statement - v == DC + ac_spec; i.e. Does the quantity DC have any contribution in the frequency domain? Thanks, Sameer -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Thu Sep 13 10:43:44 2007
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