RE: [1076.1] Proposals for new features open for discussion

All,
 
Per Arpad's note, we are interested in seeing the encryption macro language, currently in both the Accellera 1076 VHDL updated draft and the IEEE 1364 Verilog specification Annex H, "migrate down" into the AMS specifications.  IC vendors are concerned about IP protection, and the macro approach seems to be the most general-purpose way of accommodating IP protection while taking tool variations and national policies into account.  As IBIS now supports links to both AMS languages, IC vendors interested in distributing IBIS+AMS models for signal integrity simulations are becoming concerned.
 
The encryption-versus-scrambling debate has been fought on this reflector and others like it before.  As it tends to generate more heat than light, I would like to avoid it entirely.  Can the macro approach be expanded to support both?
 
- Michael Mirmak
  Intel Corp.
  Chair, EIA IBIS Open Forum  
  http://www.eigroup.org/ibis/
  http://www.eda-twiki.org/ibis/

________________________________

From: owner-vhdl-ams@server.eda.org [mailto:owner-vhdl-ams@server.eda.org] On Behalf Of Olivier Rolland
Sent: Monday, May 14, 2007 12:15 PM
To: Muranyi, Arpad; 1076.1 mailing list
Subject: Re: [1076.1] Proposals for new features open for discussion


1)  Make a standard encryption available in VHDL-AMS.
I'm not sure about the added value of a standard encryption scheme, since there is no real security behind it due to legal limitations (root key delivery to each country legal authorities and mandatory decryption of the model for compilation purpose which makes a memory dump efficient to hach the original VHDL-AMS code) and there is a solution based over scrambling avalaible which make VHDL-AMS encryption useless.
Regards.
Olivier Rolland

  
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Muranyi, Arpad a écrit : 

	Alain,
	
	I wonder whether it was possible to add two topics to the list:
	
	1)  Make a standard encryption available in VHDL-AMS.
	2)  S-parameter support in the VHDL-AMS language through
	    some functions similar to "lpf".
	
	Thanks,
	
	Arpad
	===============================================================
	
	  

		-----Original Message-----
		From: owner-vhdl-ams@server.eda.org [mailto:owner-vhdl-ams@server.eda.org] On Behalf Of Alain Vachoux
		Sent: Tuesday, May 01, 2007 2:19 AM
		To: 1076.1 mailing list
		Subject: [1076.1] Proposals for new features open for dicussion
		
		Hi,
		
		As mentioned in the minutes of the last working group meeting, a new 
		page has been created on the P1076.1 web site at
		http://www.eda-stds.org/vhdl-ams/wwwpages_new/new_features.html
		which contains first drafts of proposals for new features in the 
		VHDL-AMS language or new standard packages.
		
		The page includes the definition of the process we'll follow and the 
		definition of the form of proposals. It also currently lists three 
		proposals in various degrees of achievement:
		- Mixed Netlists
		- Table Data Types and Lookup Functions
		- Requirements and Verification
		
		I highly encourage you to study these proposals, make comments and 
		contribute to the proposals. The discussion can be done in the 1076.1 
		mailing list vhdl-ams@vhdl.org and in the next working group meetings. 
		Currently there is no deadline on when the discussion should stop and 
		decisions have to be made in the working group.
		
		If you have other suggestions for new features, please consider 
		submitting me a document which is close to the form that is defined in 
		the web page.
		
		Best regards,
		Alain Vachoux
		    

	
	  


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