Re: [1076.1] Proposals for new features open for discussion

Arpad,

Thanks. I put Joachim Haase, the author of the seed document in the 
VHDL-AMS WG, in copy.

Again, I would like to get a well-defined list of requirements before 
starting developing syntax. I guess this has been already discussed a 
lot in the Verilog-AMS TC.

Patrick, is there any document defining the foundations on which the 
Verilog-AMS table model is built we could share and merge with Joachim's 
document?

Best regards,
Alain

Muranyi, Arpad wrote:
> Alain,
> 
> The person working on the Verilog-AMS proposal is Patrick,
> and I am copying him on this email so you can get in touch
> with him if you like.  I hope we can coordinate this effort
> and come up with something that is compatible...
> 
> Thanks,
> 
> Arpad
> ============================================================
> 
> 
> 
> -----Original Message-----
> From: Alain Vachoux [mailto:alain.vachoux@epfl.ch] 
> Sent: Friday, May 11, 2007 12:12 AM
> To: Muranyi, Arpad
> Cc: 1076.1 mailing list
> Subject: Re: [1076.1] Proposals for new features open for discussion
> 
> Dear Arpad,
> 
> Thanks for the link to the Verilog-AMS work. I know that the definition 
> of the support of table models in Verilog-AMS started a long time ago 
> and is pretty elaborated today. On the VHDL-AMS side we are starting 
> with requirement gathering. It would be very beneficial to at least 
> share the same semantic view on what table models should be able to do. 
> This would contribute to a better interoperability between the languages.
> 
> Let me know who I can contact to discuss this further.
> 
> Best regards,
> Alain
> 
> Muranyi, Arpad wrote:
>> I am not sure if any of you aware of this,
>> but there is a similar proposal on the
>> table in the Verilog-AMS group:
>>
>> http://www.eda-stds.org/verilog-ams/htmlpages/public-docs/table_model_LRM_23_proposal_1.pdf
>>
>> It would be nice if the two "table_models"
>> would be identical or very similar...  Any
>> suggestions on how to get the two groups
>> talking to each other?
>>
>> Arpad
>> ===========================================
>>
>> -----Original Message-----
>> From: owner-vhdl-ams@server.eda.org [mailto:owner-vhdl-ams@server.eda.org] On Behalf Of Alain Vachoux
>> Sent: Tuesday, May 01, 2007 2:19 AM
>> To: 1076.1 mailing list
>> Subject: [1076.1] Proposals for new features open for dicussion
>>
>> Hi,
>>
>> As mentioned in the minutes of the last working group meeting, a new 
>> page has been created on the P1076.1 web site at
>> http://www.eda-stds.org/vhdl-ams/wwwpages_new/new_features.html
>> which contains first drafts of proposals for new features in the 
>> VHDL-AMS language or new standard packages.
>>
>> The page includes the definition of the process we'll follow and the 
>> definition of the form of proposals. It also currently lists three 
>> proposals in various degrees of achievement:
>> - Mixed Netlists
>> - Table Data Types and Lookup Functions
>> - Requirements and Verification
>>
>> I highly encourage you to study these proposals, make comments and 
>> contribute to the proposals. The discussion can be done in the 1076.1 
>> mailing list vhdl-ams@vhdl.org and in the next working group meetings. 
>> Currently there is no deadline on when the discussion should stop and 
>> decisions have to be made in the working group.
>>
>> If you have other suggestions for new features, please consider 
>> submitting me a document which is close to the form that is defined in 
>> the web page.
>>
>> Best regards,
>> Alain Vachoux
>>
> 

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