Generating noise in VHDL-AMS

Dear Joachim Haase,
Thank you, for your support. But actually,I used this solution. But if there
is a solution that is can be in the VHDL code without using eldo noise
source, I would be grateful if someone point it out.

By the way, there is a function : Uniform in IEEE.MATH_REAL that generates
random number from 0.0 to 1.0 uniformly distributed. But the problem is :
1- This functions need variables, which mean needs process. I don't know a
way, to assign a quantity with a varaible through the process. Which make it
finally, don't work for Analog.
2- The noise actually is gaussian distributed, But this one is uniform. But
still can work.

Finally, Thank you for your post, I was delighted to see it.

Amro Tork