Dear WG members, A meeting of the IEEE 1076.1 Working Group will take place at the DATE conference (http://www.date-conference.com) on Wednesday 9 March 2005, from 12h45 to 14h in Room 12 (please check again the room number on site). The agenda is as follows: 1. WG status update (Alain Vachoux) - New steering committee - New PAR - LRM update: funding, schedule 2. IBIS presentation (Arpad Muranyi, Intel Corp.) IBIS (I/O Buffer Information Specification) is a very widely used EIA standard for describing I/O buffers for system signal integrity simulations, using behavioral data (usually I-V and V-t curves). Recently, the IBIS Open Forum, which manages the specification, approved an update which enables IBIS models to link to VHDL-AMS and Verilog-AMS code. Arpad will have a brief set of presentations slides on IBIS and AMS to review. 3. VHDL-AMS language direction (Alain Vachoux) This is a starting discussion about the direction the language should take beyond the coming LRM update. Best regards and see you in Munich, Alain Vachoux IEEE 1076.1 ChairReceived on Mon Feb 21 23:23:14 2005
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