Subject: Re: Clarification on sensitivity list
From: Peter Ashenden (peter@ashenden.com.au)
Date: Wed Jan 09 2002 - 18:04:58 PST
On Thu, 2002-01-10 at 09:50, Craig Winters wrote:
>
> Request for clarification of IEEE Std 1076.1-1999, (VHDL-AMS)
>
> Working Group,
>
> My question concerns the sensitivity list as described in section
> 8.1. This is used in the wait statement, process statement and
> concurrent break statement. I believe it is the same construct
> in each of these locations.
>
> In section 8.1 is the statement:
>
> Each signal name in the sensitivity list must be a static signal name.
>
> To determine what is a static name, I refer to section 6.1 where
> this text is found:
>
> A name is said to be a static name if and only if one of the following
> conditions holds:
> - The name is a simple name or selected name [...]
> - The name is an indexed name [...]
> - The name is a slice name [...]
>
> This does not seem to allow an attribute name where a static name is
> required, as in the sensitivity clause. In that case, the following
> would be errors:
>
> WAIT ON q'ABOVE(e);
> BREAK ON s'DELAYED(t);
Craig,
You have identified a deficiency in the base VHDL standard that VHDL-AMS
was based on. The revision of the VHDL standard currently in train
corrects this by adding a further item to the list in 6.1:
-- The name is an attribute name whose prefix is a static signal name
and whose suffix is one of the predefined attributes 'DELAYED,
'STABLE, 'QUIET, or 'TRANSACTION.
I imagine a future revision to VHDL-AMS would incorporate this addition
and augment it with the 'ABOVE attribute.
Cheers,
PA
-- Dr. Peter J. Ashenden peter@ashenden.com.au Ashenden Designs Pty. Ltd. www.ashenden.com.au PO Box 640 Ph: +61 8 8339 7532 Stirling, SA 5152 Fax: +61 8 8339 2616 Australia Mobile: +61 414 70 9106
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