IEEE P1164 Working Group - Change Proposal ID: CP-007 Proposer: Peter Ashenden (Based on requirements gathering) Status: Proposed (1-Jun-2001) Analyzed (14-Feb-2003) To be resolved Summary: Provide text I/O package for standard logic Detail: (From slides presented at VIUF-1999) VHDL supports READ and WRITE procedures for all pre-defined types. An overloaded implementation for IEEE 1164 types std_logic, std_logic_ ector and std_ulogic_vector is needed. procedure READ( L: inout LINE; VALUE out std_logic; GOOD: out BOOLEAN); procedure READ( L: inout LINE; VALUE out std_logic); procedure WRITE( L: inout LINE; VALUE in std_logic; JUSTIFIED: in SIDE:= RIGHT; FIELD: in WIDTH:= 0); -- same procedures also for std_logic_vector, std_ulogic_vector -- and other std_logic related types Workshop summary - Yes, let's do it - Separate package for IO routines Analysis: By Peter Ashenden , 14-Feb-2003 The need for overloaded read and write procedures for standard logic scalar and vector types is now widely met by the std_logic_textio package developed by Synopsys, Inc. Synopsys allows the package to be distributed without restriction, but retains copyright. Synopsys has now granted permission to the P1164 Working Group to include the package in a revision of IEEE Std. 1164. The Working Group Chair has the letter of permission and source code provided by Synopsys. The terms of the grant of permission allow use and modification of the material world wide and for all future revisions and editions in all media. The letter asks the Working Group to ensure that the final form of the standard be compatible with the current version of the package, since many users include the current version in their models. The code listed below uses the Synopsys code as a starting point with the following revisions: 1. General formatting a style tidy up. 2. Removed synopsys synthesis_on and synthesis_off metacomments, since they are not standard. 3. The white space characters skipped by the read procedures in the original code are space, tab and carriage return. This is inconsistent with the behavior of the read procedures in std.textio - they skip space, non-breaking space and tab characters. The code is revised to be consistent with std.textio. 4. The original package body code includes hread and oread procedures for bit vectors. In the case of hread, the bit vector versions are not used and are not visible outside the package. In the case of oread, the standard-logic versions are based on use of the bit-vector versions, precluding reading of Z and X values. It appears that the code may have evolved over time, leading to this inconsistency. The code below removes the bit-vector versions and makes the standard-logic vector versions consistent with one another. 5. The hread and oread procedures in the original code do not correctly deal with input strings that are empty or all white space. This is corrected in the code below. Changes to 1164-1993: - Page 1, 1.1, first sentence: change to: This standard is embodied in the Std_logic_1164 and Std_logic_textio package declarations and the semantics of the Std_logic_1164 and Std_logic_textio package bodies along with this clause 1 documentation. - Page 1, 1.2, a): change "package declaration" to "package declarations". - Page 1, 1.2, b): change to: The Std_logic_1164 package body represents the formal semantics of the implementation of the Std_logic_1164 package declaration, and the Std_logic_textio package body represents the formal semantics of the implementation of the Std_logic_textio package declaration. Implementers of these package bodies may choose to simply compile the package bodies as they are; or they may choose to implement the package bodies in the most efficient form available to the user. Implmenters shall not implement a semantic that differs from the formal semantic provided herein, except that where procedures in Std_logic_textio issue an assertion violation in response to an error, implementers may report the error in an implementation-defined manner. - Insert new clause 4 containing the text: 4. Std_logic_textio package declaration -- -------------------------------------------------------------------- -- -- Title : std_logic_textio -- Library : This package shall be compiled into a library -- : symbolically named IEEE. -- : -- Developers: Adapted by IEEE P1164 Working Group from -- : source donated by Synopsys, Inc. -- : -- Purpose : This packages defines procedures for reading and writing -- : standard-logic scalars and vectors in binary, hexadecimal -- : and octal format. -- : -- Limitation: None. -- : -- Note : No declarations or definitions shall be included in, -- : or excluded from this package. The "package declaration" -- : defines the procedures of std_logic_textio. -- : The std_logic_textio package body shall be -- : considered the formal definition of the semantics of -- : this package, except that where a procedure issues an -- : assertion violation, the standard does not specify the -- : required behavior in response to the erroneous condition. -- : Tool developers may choose to implement the package body -- : in the most efficient manner available to them. -- : -- -------------------------------------------------------------------- -- -- Copyright (c) 1990, 1991, 1992 by Synopsys, Inc. All rights reserved. -- -- This source file may be used and distributed without restriction -- provided that this copyright statement is not removed from the file -- and that any derivative work contains this copyright notice. -- -- -------------------------------------------------------------------- use STD.textio.all; library IEEE; use IEEE.std_logic_1164.all; package STD_LOGIC_TEXTIO is -- Read and Write procedures for STD_ULOGIC and STD_ULOGIC_VECTOR procedure READ (L: inout LINE; VALUE: out STD_ULOGIC; GOOD: out BOOLEAN); procedure READ (L: inout LINE; VALUE: out STD_ULOGIC); procedure READ (L: inout LINE; VALUE: out STD_ULOGIC_VECTOR; GOOD: out BOOLEAN); procedure READ (L: inout LINE; VALUE: out STD_ULOGIC_VECTOR); procedure WRITE (L: inout LINE; VALUE: in STD_ULOGIC; JUSTIFIED: in SIDE := RIGHT; FIELD: in WIDTH := 0); procedure WRITE (L: inout LINE; VALUE: in STD_ULOGIC_VECTOR; JUSTIFIED: in SIDE := RIGHT; FIELD: in WIDTH := 0); -- Read and Write procedures for STD_LOGIC_VECTOR procedure READ (L: inout LINE; VALUE: out STD_LOGIC_VECTOR; GOOD: out BOOLEAN); procedure READ (L: inout LINE; VALUE: out STD_LOGIC_VECTOR); procedure WRITE (L: inout LINE; VALUE: in STD_LOGIC_VECTOR; JUSTIFIED: in SIDE := RIGHT; FIELD: in WIDTH := 0); -- Read and Write procedures for Hex values procedure HREAD (L: inout LINE; VALUE: out STD_ULOGIC_VECTOR; GOOD : out BOOLEAN); procedure HREAD (L: inout LINE; VALUE: out STD_ULOGIC_VECTOR); procedure HWRITE (L: inout LINE; VALUE: in STD_ULOGIC_VECTOR; JUSTIFIED: in SIDE := RIGHT; FIELD:in WIDTH := 0); procedure HREAD (L: inout LINE; VALUE: out STD_LOGIC_VECTOR; GOOD: out BOOLEAN); procedure HREAD (L: inout LINE; VALUE: out STD_LOGIC_VECTOR); procedure HWRITE (L: inout LINE; VALUE: in STD_LOGIC_VECTOR; JUSTIFIED: in SIDE := RIGHT; FIELD: in WIDTH := 0); -- Read and Write procedures for Octal values procedure OREAD (L: inout LINE; VALUE: out STD_ULOGIC_VECTOR; GOOD: out BOOLEAN); procedure OREAD (L: inout LINE; VALUE: out STD_ULOGIC_VECTOR); procedure OWRITE (L: inout LINE; VALUE: in STD_ULOGIC_VECTOR; JUSTIFIED:in SIDE := RIGHT; FIELD:in WIDTH := 0); procedure OREAD (L: inout LINE; VALUE: out STD_LOGIC_VECTOR; GOOD: out BOOLEAN); procedure OREAD (L: inout LINE; VALUE: out STD_LOGIC_VECTOR); procedure OWRITE (L: inout LINE; VALUE: in STD_LOGIC_VECTOR; JUSTIFIED:in SIDE := RIGHT; FIELD:in WIDTH := 0); end STD_LOGIC_TEXTIO; - Insert new clause 5 containing the text: 5. Std_logic_textio package body -- -------------------------------------------------------------------- -- -- Title : std_logic_textio -- Library : This package shall be compiled into a library -- : symbolically named IEEE. -- : -- Developers: Adapted by IEEE P1164 Working Group from -- : source donated by Synopsys, Inc. -- : -- Purpose : This packages defines procedures for reading and writing -- : standard-logic scalars and vectors in binary, hexadecimal -- : and octal format. -- : -- Limitation: None. -- : -- Note : No declarations or definitions shall be included in, -- : or excluded from this package. The "package declaration" -- : defines the procedures of std_logic_textio. -- : The std_logic_textio package body shall be -- : considered the formal definition of the semantics of -- : this package, except that where a procedure issues an -- : assertion violation, the standard does not specify the -- : required behavior in response to the erroneous condition. -- : Tool developers may choose to implement the package body -- : in the most efficient manner available to them. -- : -- -------------------------------------------------------------------- -- -- Copyright (c) 1990, 1991, 1992 by Synopsys, Inc. All rights reserved. -- -- This source file may be used and distributed without restriction -- provided that this copyright statement is not removed from the file -- and that any derivative work contains this copyright notice. -- -- -------------------------------------------------------------------- package body STD_LOGIC_TEXTIO is -- Type and constant definitions used to map STD_ULOGIC values -- into/from character values. type MVL9plus is ('U', 'X', '0', '1', 'Z', 'W', 'L', 'H', '-', ERROR); type char_indexed_by_MVL9 is array (STD_ULOGIC) of character; type MVL9_indexed_by_char is array (character) of STD_ULOGIC; type MVL9plus_indexed_by_char is array (character) of MVL9plus; constant MVL9_to_char: char_indexed_by_MVL9 := "UX01ZWLH-"; constant char_to_MVL9: MVL9_indexed_by_char := ('U' => 'U', 'X' => 'X', '0' => '0', '1' => '1', 'Z' => 'Z', 'W' => 'W', 'L' => 'L', 'H' => 'H', '-' => '-', others => 'U'); constant char_to_MVL9plus: MVL9plus_indexed_by_char := ('U' => 'U', 'X' => 'X', '0' => '0', '1' => '1', 'Z' => 'Z', 'W' => 'W', 'L' => 'L', 'H' => 'H', '-' => '-', others => ERROR); constant NBSP : character := character'val(160); -- Read and Write procedures for STD_ULOGIC and STD_ULOGIC_VECTOR procedure READ (L: inout LINE; VALUE: out STD_ULOGIC; GOOD: out BOOLEAN) is variable c: character; variable readOk: BOOLEAN; begin loop -- skip white space read(l, c, readOk); -- but also exit on a bad read exit when (readOk = FALSE) or ((c /= ' ') and (c /= NBSP) and (c /= HT)); end loop; if not readOk then good := FALSE; else if char_to_MVL9plus(c) = ERROR then value := 'U'; good := FALSE; else value := char_to_MVL9(c); good := TRUE; end if; end if; end READ; procedure READ (L: inout LINE; VALUE: out STD_ULOGIC_VECTOR; GOOD: out BOOLEAN) is variable m: STD_ULOGIC; variable c: character; variable s: string(1 to value'length-1); variable mv: STD_ULOGIC_VECTOR(0 to value'length-1); constant allU: STD_ULOGIC_VECTOR(0 to value'length-1) := (others => 'U'); variable readOk: BOOLEAN; begin loop -- skip white space read(l, c, readOk); exit when (readOk = FALSE) or ((c /= ' ') and (c /= NBSP) and (c /= HT)); end loop; -- Bail out if there was a bad read if not readOk then good := FALSE; return; end if; if char_to_MVL9plus(c) = ERROR then value := allU; good := FALSE; return; end if; read(l, s, readOk); -- Bail out if there was a bad read if not readOk then good := FALSE; return; end if; for i in 1 to value'length-1 loop if char_to_MVL9plus(s(i)) = ERROR then value := allU; good := FALSE; return; end if; end loop; mv(0) := char_to_MVL9(c); for i in 1 to value'length-1 loop mv(i) := char_to_MVL9(s(i)); end loop; value := mv; good := TRUE; end READ; procedure READ (L: inout LINE; VALUE: out STD_ULOGIC) is variable c: character; begin loop -- skip white space read(l, c); exit when (c /= ' ') and (c /= NBSP) and (c /= HT); end loop; if char_to_MVL9plus(c) = ERROR then value := 'U'; assert FALSE report "READ(STD_ULOGIC) Error: Character '" & c & "' read, expected STD_ULOGIC literal."; else value := char_to_MVL9(c); end if; end READ; procedure READ (L: inout LINE; VALUE: out STD_ULOGIC_VECTOR) is variable m: STD_ULOGIC; variable c: character; variable s: string(1 to value'length-1); variable mv: STD_ULOGIC_VECTOR(0 to value'length-1); constant allU: STD_ULOGIC_VECTOR(0 to value'length-1) := (others => 'U'); begin loop -- skip white space read(l, c); exit when (c /= ' ') and (c /= NBSP) and (c /= HT); end loop; if char_to_MVL9plus(c) = ERROR then value := allU; assert FALSE report "READ(STD_ULOGIC_VECTOR) Error: Character '" & c & "' read, expected STD_ULOGIC literal."; return; end if; read(l, s); for i in 1 to value'length-1 loop if char_to_MVL9plus(s(i)) = ERROR then value := allU; assert FALSE report "READ(STD_ULOGIC_VECTOR) Error: Character '" & s(i) & "' read, expected STD_ULOGIC literal."; return; end if; end loop; mv(0) := char_to_MVL9(c); for i in 1 to value'length-1 loop mv(i) := char_to_MVL9(s(i)); end loop; value := mv; end READ; procedure WRITE (L: inout LINE; VALUE: in STD_ULOGIC; JUSTIFIED: in SIDE := RIGHT; FIELD: in WIDTH := 0) is begin write(l, MVL9_to_char(value), justified, field); end WRITE; procedure WRITE (L: inout LINE; VALUE: in STD_ULOGIC_VECTOR; JUSTIFIED: in SIDE := RIGHT; FIELD: in WIDTH := 0) is variable s: string(1 to value'length); variable m: STD_ULOGIC_VECTOR(1 to value'length) := value; begin for i in 1 to value'length loop s(i) := MVL9_to_char(m(i)); end loop; write(l, s, justified, field); end WRITE; -- Read and Write procedures for STD_LOGIC_VECTOR procedure READ (L: inout LINE; VALUE: out STD_LOGIC_VECTOR; GOOD: out BOOLEAN) is variable tmp: STD_ULOGIC_VECTOR(VALUE'length-1 downto 0); begin READ(L, tmp, GOOD); VALUE := STD_LOGIC_VECTOR(tmp); end READ; procedure READ (L: inout LINE; VALUE: out STD_LOGIC_VECTOR) is variable tmp: STD_ULOGIC_VECTOR(VALUE'length-1 downto 0); begin READ(L, tmp); VALUE := STD_LOGIC_VECTOR(tmp); end READ; procedure WRITE (L: inout LINE; VALUE: in STD_LOGIC_VECTOR; JUSTIFIED: in SIDE := RIGHT; FIELD: in WIDTH := 0) is begin WRITE(L, STD_ULOGIC_VECTOR(VALUE), JUSTIFIED, FIELD); end WRITE; -- Hex Read and Write procedures for STD_ULOGIC_VECTOR. procedure Char2QuadBits (C: Character; RESULT: out std_ulogic_vector(3 downto 0); GOOD: out Boolean; ISSUE_ERROR: in Boolean) is begin case c is when '0' => result := x"0"; good := TRUE; when '1' => result := x"1"; good := TRUE; when '2' => result := x"2"; good := TRUE; when '3' => result := x"3"; good := TRUE; when '4' => result := x"4"; good := TRUE; when '5' => result := x"5"; good := TRUE; when '6' => result := x"6"; good := TRUE; when '7' => result := x"7"; good := TRUE; when '8' => result := x"8"; good := TRUE; when '9' => result := x"9"; good := TRUE; when 'A' | 'a' => result := x"A"; good := TRUE; when 'B' | 'b' => result := x"B"; good := TRUE; when 'C' | 'c' => result := x"C"; good := TRUE; when 'D' | 'd' => result := x"D"; good := TRUE; when 'E' | 'e' => result := x"E"; good := TRUE; when 'F' | 'f' => result := x"F"; good := TRUE; when 'Z' => result := "ZZZZ"; good := TRUE; when 'X' => result := "XXXX"; good := TRUE; when others => if ISSUE_ERROR then assert FALSE report "HREAD Error: Read a '" & c & "', expected a Hex character (0-F)."; end if; good := FALSE; end case; end; procedure HREAD (L: inout LINE; VALUE: out STD_ULOGIC_VECTOR; GOOD: out BOOLEAN) is variable ok: boolean; variable c: character; constant ne: integer := value'length/4; variable sv: std_ulogic_vector(0 to value'length-1); variable s: string(1 to ne-1); begin if value'length mod 4 /= 0 then good := FALSE; return; end if; loop -- skip white space read(l, c, ok); exit when (ok = FALSE) or ((c /= ' ') and (c /= NBSP) and (c /= HT)); end loop; -- Bail out if there was a bad read if not ok then good := FALSE; return; end if; Char2QuadBits(c, sv(0 to 3), ok, FALSE); if not ok then good := FALSE; return; end if; read(L, s, ok); if not ok then good := FALSE; return; end if; for i in 1 to ne-1 loop Char2QuadBits(s(i), sv(4*i to 4*i+3), ok, FALSE); if not ok then good := FALSE; return; end if; end loop; good := TRUE; value := sv; end HREAD; procedure HREAD (L: inout LINE; VALUE: out STD_ULOGIC_VECTOR) is variable ok: boolean; variable c: character; constant ne: integer := value'length/4; variable sv: std_ulogic_vector(0 to value'length-1); variable s: string(1 to ne-1); begin if value'length mod 4 /= 0 then assert FALSE report "HREAD Error: Trying to read vector " & "with an odd (non multiple of 4) length"; return; end if; loop -- skip white space read(l, c, ok); exit when (ok = FALSE) or ((c /= ' ') and (c /= NBSP) and (c /= HT)); end loop; -- Bail out if there was a bad read if not ok then assert FALSE report "HREAD Error: Failed skipping white space"; return; end if; Char2QuadBits(c, sv(0 to 3), ok, TRUE); if not ok then return; end if; read(L, s, ok); if not ok then assert FALSE report "HREAD Error: Failed to read the STRING"; return; end if; for i in 1 to ne-1 loop Char2QuadBits(s(i), sv(4*i to 4*i+3), ok, TRUE); if not ok then return; end if; end loop; value := sv; end HREAD; procedure HWRITE (L: inout LINE; VALUE: in STD_ULOGIC_VECTOR; JUSTIFIED: in SIDE := RIGHT; FIELD: in WIDTH := 0) is variable quad: std_ulogic_vector(0 to 3); constant ne: integer := value'length/4; variable sv: std_ulogic_vector(0 to value'length-1) := value; variable s: string(1 to ne); begin if value'length mod 4 /= 0 then assert FALSE report "HWRITE Error: Trying to read vector " & "with an odd (non multiple of 4) length"; return; end if; for i in 0 to ne-1 loop quad := To_X01Z(sv(4*i to 4*i+3)); case quad is when x"0" => s(i+1) := '0'; when x"1" => s(i+1) := '1'; when x"2" => s(i+1) := '2'; when x"3" => s(i+1) := '3'; when x"4" => s(i+1) := '4'; when x"5" => s(i+1) := '5'; when x"6" => s(i+1) := '6'; when x"7" => s(i+1) := '7'; when x"8" => s(i+1) := '8'; when x"9" => s(i+1) := '9'; when x"A" => s(i+1) := 'A'; when x"B" => s(i+1) := 'B'; when x"C" => s(i+1) := 'C'; when x"D" => s(i+1) := 'D'; when x"E" => s(i+1) := 'E'; when x"F" => s(i+1) := 'F'; when others => if (quad = "ZZZZ") then s(i+1) := 'Z'; else s(i+1) := 'X'; end if; end case; end loop; write(L, s, JUSTIFIED, FIELD); end HWRITE; -- Octal Read and Write procedures for STD_ULOGIC_VECTOR. procedure Char2TriBits (C: Character; RESULT: out std_ulogic_vector(2 downto 0); GOOD: out Boolean; ISSUE_ERROR: in Boolean) is begin case c is when '0' => result := o"0"; good := TRUE; when '1' => result := o"1"; good := TRUE; when '2' => result := o"2"; good := TRUE; when '3' => result := o"3"; good := TRUE; when '4' => result := o"4"; good := TRUE; when '5' => result := o"5"; good := TRUE; when '6' => result := o"6"; good := TRUE; when '7' => result := o"7"; good := TRUE; when 'Z' => result := "ZZZ"; good := TRUE; when 'X' => result := "XXX"; good := TRUE; when others => if ISSUE_ERROR then assert FALSE report "OREAD Error: Read a '" & c & "', expected an Octal character (0-7)."; end if; good := FALSE; end case; end; procedure OREAD (L: inout LINE; VALUE: out STD_ULOGIC_VECTOR; GOOD: out BOOLEAN) is variable ok: boolean; variable c: character; constant ne: integer := value'length/3; variable sv: std_ulogic_vector(0 to value'length-1); variable s: string(1 to ne-1); begin if value'length mod 3 /= 0 then good := FALSE; return; end if; loop -- skip white space read(l, c, ok); exit when (ok = FALSE) or ((c /= ' ') and (c /= NBSP) and (c /= HT)); end loop; -- Bail out if there was a bad read if not ok then good := FALSE; return; end if; Char2TriBits(c, sv(0 to 2), ok, FALSE); if not ok then good := FALSE; return; end if; read(L, s, ok); if not ok then good := FALSE; return; end if; for i in 1 to ne-1 loop Char2TriBits(s(i), sv(3*i to 3*i+2), ok, FALSE); if not ok then good := FALSE; return; end if; end loop; good := TRUE; value := sv; end OREAD; procedure OREAD (L: inout LINE; VALUE: out STD_ULOGIC_VECTOR) is variable c: character; variable ok: boolean; constant ne: integer := value'length/3; variable sv: std_ulogic_vector(0 to value'length-1); variable s: string(1 to ne-1); begin if value'length mod 3 /= 0 then assert FALSE report "OREAD Error: Trying to read vector " & "with an odd (non multiple of 3) length"; return; end if; loop -- skip white space read(l, c, ok); exit when (ok = FALSE) or ((c /= ' ') and (c /= NBSP) and (c /= HT)); end loop; -- Bail out if there was a bad read if not ok then assert FALSE report "OREAD Error: Failed skipping white space"; return; end if; Char2TriBits(c, sv(0 to 2), ok, TRUE); if not ok then return; end if; read(L, s, ok); if not ok then assert FALSE report "OREAD Error: Failed to read the STRING"; return; end if; for i in 1 to ne-1 loop Char2TriBits(s(i), sv(3*i to 3*i+2), ok, TRUE); if not ok then return; end if; end loop; value := sv; end OREAD; procedure OWRITE (L: inout LINE; VALUE: in STD_ULOGIC_VECTOR; JUSTIFIED: in SIDE := RIGHT; FIELD: in WIDTH := 0) is variable tri: std_ulogic_vector(0 to 2); constant ne: integer := value'length/3; variable sv: std_ulogic_vector(0 to value'length-1) := value; variable s: string(1 to ne); begin if value'length mod 3 /= 0 then assert FALSE report "OWRITE Error: Trying to read vector " & "with an odd (non multiple of 3) length"; return; end if; for i in 0 to ne-1 loop tri := To_X01Z(sv(3*i to 3*i+2)); case tri is when o"0" => s(i+1) := '0'; when o"1" => s(i+1) := '1'; when o"2" => s(i+1) := '2'; when o"3" => s(i+1) := '3'; when o"4" => s(i+1) := '4'; when o"5" => s(i+1) := '5'; when o"6" => s(i+1) := '6'; when o"7" => s(i+1) := '7'; when others => if (tri = "ZZZ") then s(i+1) := 'Z'; else s(i+1) := 'X'; end if; end case; end loop; write(L, s, JUSTIFIED, FIELD); end OWRITE; -- Hex Read and Write procedures for STD_LOGIC_VECTOR procedure HREAD (L: inout LINE; VALUE: out STD_LOGIC_VECTOR; GOOD: out BOOLEAN) is variable tmp: STD_ULOGIC_VECTOR(VALUE'length-1 downto 0); begin HREAD(L, tmp, GOOD); VALUE := STD_LOGIC_VECTOR(tmp); end HREAD; procedure HREAD (L: inout LINE; VALUE: out STD_LOGIC_VECTOR) is variable tmp: STD_ULOGIC_VECTOR(VALUE'length-1 downto 0); begin HREAD(L, tmp); VALUE := STD_LOGIC_VECTOR(tmp); end HREAD; procedure HWRITE (L: inout LINE; VALUE: in STD_LOGIC_VECTOR; JUSTIFIED: in SIDE := RIGHT; FIELD: in WIDTH := 0) is begin HWRITE(L, STD_ULOGIC_VECTOR(VALUE), JUSTIFIED, FIELD); end HWRITE; -- Octal Read and Write procedures for STD_LOGIC_VECTOR procedure OREAD (L: inout LINE; VALUE: out STD_LOGIC_VECTOR; GOOD: out BOOLEAN) is variable tmp: STD_ULOGIC_VECTOR(VALUE'length-1 downto 0); begin OREAD(L, tmp, GOOD); VALUE := STD_LOGIC_VECTOR(tmp); end OREAD; procedure OREAD (L: inout LINE; VALUE: out STD_LOGIC_VECTOR) is variable tmp: STD_ULOGIC_VECTOR(VALUE'length-1 downto 0); begin OREAD(L, tmp); VALUE := STD_LOGIC_VECTOR(tmp); end OREAD; procedure OWRITE (L: inout LINE; VALUE: in STD_LOGIC_VECTOR; JUSTIFIED: in SIDE := RIGHT; FIELD: in WIDTH := 0) is begin OWRITE(L, STD_ULOGIC_VECTOR(VALUE), JUSTIFIED, FIELD); end OWRITE; end STD_LOGIC_TEXTIO; Resolution: [To be determined by the P1164 Working Group]