Re: [vhdl-200x-ft] VHDL Fixed-Point Comment

I looked into this myself a little.

Because you need to use the "downto" direction (a "to" directory will
cause an error), we can write it this way:

function ilength (arg : ufixed) return natural is
begin
   if arg'high < 0 then return 0;
   else return arg'high+1;
   end if;
end function ilength;

function flength (arg : ufixed) return natural is
begin
   if arg'low > -1 then return 0;
   else return -arg'low;
   end if;
end function flength;

Making this an attribute would be nasty because any nonzero index range
is valid here.  In Simulink, the index must include the "0" bit, making the
returned value from these function "natural".

Scott D. Hoy wrote:

> Hi,
> 
>  
> 
> I am wondering with the VHDL fixed-point package would it benefit anyone 
> if two new attributes 'ilength and 'flength could be added to the LRM or 
> is there is a way for the designer to define 'ilength and 'flength in a 
> custom user defined package. 'ilength would return a natural that would 
> be the number of integer bits and 'flength also would return a natural 
> that would be the number of fractional bits. For obtaining the number of 
> integer bits 'ilength would be a constant method for both the sfixed and 
> ufixed types.  Currently to obtain the number of integer bits the 'high 
> returns the correct number for sfixed but for ufixed a 'high+1 needs to 
> be done to obtain the correct number.  The 'ilength would clean up the 
> users code by removing 'high+1 or 'high with a common attribute that 
> would return the correct number based on the data type sfixed or 
> ufixed.  For consistency and to keep vector lengths positive, the 
> 'flength would return the number of fractional bits without having to do 
> abs(fp'low).  This could clean up the resulting code and make it easier 
> to read within a design team.
> 
>  
> 
> I have started building a fixed-point library to help speed up 
> translation of the Mathworks Simulink Fixed-Point Models to VHDL and 
> having the ability to call a 'ilength or 'flength would come in handy on 
> building very generic synthesizable VHDL fixed-point library(being able 
> to have fully generic arrays and records (i.e. a vector/matrix of sfixed 
> and/or ufixed and complex sfixed and a complex ufixed along with 
> vector/matrix of complex sfixed and ufixed) such that the element 
> dimension can be defined at the same time as the array dimensions would 
> also be a major improvement to VHDL arrays and records - I think this 
> capability will be in the next VHDL revision correct?). For your 
> information I have had major success in converting Simulink fixed-point 
> models to VHDL using the current preliminary fixed-point packages.  
> Pairing the VHDL fixed-point package with the Mathworks Simulink and 
> Link for ModelSim tool significantly speeds up conversion time for the 
> tools I use.  I feel once the VHDL fixed-point package is officially 
> released this will make things interesting for the companies that are 
> making automatic HDL code generation from high level tools such as Simulink.
> 
>  
> 
> Comments about the 'ilength or 'flength?
> 
>  
> 
>  
> 
> Scott D. Hoy
> 
> Phone:301.286.2619
> 
> NASA GSFC E-mail: scott.d.hoy@gsfc.nasa.gov 
> <mailto:scott.d.hoy@gsfc.nasa.gov>
> 
> Honeywell - TSI E-mail: scott.hoy@honeywell-tsi.com 
> <mailto:scott.hoy@honeywell-tsi.com>
> 
> Honeywell - TSI
> 
> NASA Goddard Space Flight Center
> 
>  
> 
>  
> 


-- 
David W. Bishop dbishop@vhdl.org       All standard disclaimers apply.