[vhdl-200x-ft] Review of Fixed_Pkg

Review of Package Declaration of fixed_pkg:

Missing logic operators
    Without logic operators, basic operations like and-or
    readback type logic cannot be done without converting
    to std_logic_vector.
    With logic operators it makes fixed_pkg more consistent
    with Numeric_std.

To_X01 is missing
    Need this function to be consistent with numeric_std/std_logic_1164

Need constants:
     constant fixed_truncate: boolean := false; -- Round or truncate
     constant fixed_modulo: boolean := false-- saturate or wrap

   Complements the positive ones already defined:
     constant fixed_round : boolean := true; -- Round or truncate
     constant fixed_saturate : boolean := true -- saturate or wrap

Should we use generics and create fixed_pkg_base?
   Round_Style
   EndPoint_Style
   GuardBits

Use of resize vs. to_ufixed?
   It seems like there would be less to remember if
   resize were named to_ufixed instead. That way all
   conversions that convert to a particular size of ufixed
   use the same function name independent of the argument.

   to_ufixed(ufixed, ... vs.
   resize(ufixed, ...

For to_unsigned and to_signed, do we need to specify a rounding mode and saturate mode?
   Consider the ufixed value: "1111.111"
   -- unsigned fixed point to unsigned (truncates)
   function to_unsigned (
     arg : ufixed; -- fixed point input
     constant size : NATURAL) -- length of output
     return UNSIGNED;

For to_integer for ufixed and sfixed, do we need to specify a saturate mode?
   Consider the ufixed value: "1111.111"
   function to_integer (
     arg : ufixed; -- fixed point input
     constant round_style : BOOLEAN := fixed_round) -- rounding by default
     return NATURAL;

 From unsigned to sfixed:
   to_sfixed(signed('0' & A_uv), ...) ;

What is to_fix and to_ufix?
   It seems there should be one input format for
   the fraction width, it should either be a positive
   value (like to_fix and to_ufix) or it should be a
   negative index value (like to_sfixed and to_ufixed).

   Interesting boundry conditions that don't work well with either model:
     No fraction and lacking some of the right bits of the integer.
       for example: signal A : ufixed (7 downto 3) ;
     No integer portion and lacking some of the left bits of the fraction.
       for example: signal A : ufixed (-3 downto -7) ;

To_fix is badly named:
   It would be more consistent if to_fix were to_sfix.

I will send the review of the package body separately.

Cheers,
Jim

-- 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Jim Lewis
Director of Training             mailto:Jim@SynthWorks.com
SynthWorks Design Inc.           http://www.SynthWorks.com
1-503-590-4787
Expert VHDL Training for Hardware Design and Verification
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~