Re: [vhdl-200x-ft] Generics in floating point packages

Jim Lewis wrote:

> David,
> One thing I missed in your last proposal was that
> you were fixing the size of the fraction and exponent
> with type generics. I still think we should have a
> package that allows the user to define the size of
> floating and fixed point numbers they want. Perhaps
> with the package interface:
>
> package fphdl_pkg is
> generic ( fp_round_style : round_type := round_nearest; -- rounding
> fp_denormalize : BOOLEAN := true; -- Denormal numbers
> fp_check_error : BOOLEAN := true; -- NAN processing
> fp_guard_bits : NATURAL := 3 ); -- guard bits

Actually, one of the beauties of the package generics is that you do NOT
need to do this any more.

Suppose I have an architecture which have very efficient 18 bit
multipliers. Then I can set up my floating point number accordingly

library ieee;
use ieee.fphld_base_pkg.all;
package fphdl26_pkg is new ieee.fphdl32_pkg
   generic map (fp_fraction_width => 16,
                fp_exponent_width => 9,
                fp_round_style => round_nearest,
                fp_denormalize => false,
                fp_check_error => false,
                fp_guard_bits => 1);

use work.fphdl26_pkg.all;
entity....
architecture ...

In side the multiply routine:
The floating point fraction will be read in as 16 bits.
1 bit will be added to the top (implied 1.0)
1 bit will be added to the bottom (1 guard bit)
The result will be 18 bits wide.

Because "fp_denormalize" is truned off the exponent does not need
to be checked in every operation and does not have to be tied to the
fraction.

Because "fp_check_error" is turned off bounds on the shift registers
no longer need to be checked.

Because fp_guard_bits is "1" and "fp_round_style" is set to
"round_nearest" then a "1" in the lower bit so the result will result
in a round and a zero will not, simplifying the round routine.

-- 
NAME:     David W. Bishop           INTERNET: dbishop@vhdl.org