Re: [vhdl-200x-ft] Generics in floating point packages

From: Jim Lewis <Jim@SynthWorks.com>
Date: Fri Nov 05 2004 - 14:08:29 PST

David,
This sounds great.

It would seem to make more sense if the generic
package were named fphdl_pkg rather than fphdl32_pkg.

Since we are stepping into the void with generic types,
should we also consider using records of unconstrained
arrays as the base?

Cheers,
Jim

> From talking with Peter, I think we have a good application for
> the generics in packages (FT-DTA) proposal with the floating point
> packages.
>
> Currently we have
> fphdl_base_pkg - base routines, like "fp_addition"
> fphdl32_pkg - Definition for a 32 bit FP number with operators like "+".
> fphdl64_pkg - Definition for a 64 bit FP number
> fphdl16_pkg - Definition for a 16 bit FP number
> fphdl_pkg - User definable FP number.
>
> There are 6 constants which are the only differences between these
> last 4 packages:
> constant fp_fraction_width : NATURAL := 23; -- length 32 bits
> constant fp_exponent_width : NATURAL := 8; -- exponent 8 bits
> constant fp_round_style : round_type := round_nearest; -- round
> nearest algorithm
> constant fp_denormalize : BOOLEAN := true; -- Use Denormalized
> numbers
> constant fp_check_error : BOOLEAN := true; -- Turn on NAN and
> overflow processing
> constant fp_guard_bits : NATURAL := 3; -- number of guard bits
>
> These will turn into generics:
> package fphdl32_pkg is
> generic ( fp_fraction_width : NATURAL := 23; -- length 32 bits
> fp_exponent_width : NATURAL := 8; -- exponent 8 bits
> fp_round_style : round_type := round_nearest; -- rounding
> fp_denormalize : BOOLEAN := true; -- Denormal numbers
> fp_check_error : BOOLEAN := true; -- NAN processing
> fp_guard_bits : NATURAL := 3 ); -- guard bits
>
> type fp is floating_point (fp_fraction_width downto -fp_exponent_width);
>
> function "+" (L, R : fp) return fp;
> .....
>
> The the "fphdl64_pkg" (64 bit floating point package) would become:
>
> package fphdl64_pkg is new ieee.fphdl32_pkg
> generic map ( fp_fraction_width => 52,
> fp_exponent_width => 11,
> fp_round_style => round_nearest,
> fp_denormalize => true,
> fp_check_error => true,
> fp_guard_bits => 3);
>
> Any package of any different size FP number would become the "fphdl32_pkg"
> with different generics.
>
> The only difference is in the usage. The type will be "fp" instead
> of "fp64". The user could also say:
> alias fp64 is ieee.fphdl64_pkg.fp;
>
> Issues:
> A) The "fphdl_pkg" would disappear (no longer needed)
> B) We still need "fphdl_base_pkg":
> 1) to define the "round_nearest" type (4 different round styles in
> floating point)
> 2) Verilog cosimulation (and synthesis) would have to be done with
> the base package.
>
> C) All of the type names would become "fp". Thus a 32 bit fp number
> would have the type "fp" as would a 64 bit fp number.
> You could use an alias to redefine the type name.
>
> D) To convert one floating point format to the another you would
> have to do this:
> signal c64 : ieee.fphdl64_pkg.fp;
> signal c32 : ieee.fphdl32_pkg.fp;
> c64 <= ieee.fphdl64_pkg.fp ( -- Cast into the new type
> ieee.fphdl32_pkg.resize ( -- fphdl16_pkg resize routine
> arg => c32,
> exponent_width => ieee.fphdl64_pkg.fp_exponent_width,
> fraction_width => ieee.fphdl64_pkg.fp_fraction_width,
> denormalize => ieee.fphdl64_pkg.fp_denormalize,
> round_style => ieee.fphdl64_pkg.fp_round_style));
>

-- 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Jim Lewis
Director of Training             mailto:Jim@SynthWorks.com
SynthWorks Design Inc.           http://www.SynthWorks.com
1-503-590-4787
Expert VHDL Training for Hardware Design and Verification
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Received on Fri Nov 5 14:08:38 2004

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