[vhdl-200x-ft] Fixed Point Packages

From: Jim Lewis <Jim@SynthWorks.com>
Date: Tue Jul 06 2004 - 19:20:56 PDT

David,
It would be helpful if the proposal noted the format
for "downto" and "to".

The text the proposal states the following:
   Normally the fixed point representation will be
   "ufixed (7 downto -8)" however may people expressed the
   need for "ufixed (-8 to 7)" to be supported and to be
   treated as having the same direction as the downto
   example.

The current bit sizing rules say:
   fixed + fixed := fixed (max(l'high,r'high) downto -(max(-l'low,-r'low)))
    8:-3 + 9:-2 := 9:-3

Combine these together and it is not clear as to what
"having the same direction as the downto example"
means without reading the package.

-------------
Reading the current package implementation, I
understand the format to be the following:

For SFIXED:
   signal A : sfixed(3 downto -3) ;
     3 2 1 0 -1 -2 -3
     S N N N F F F
     S = sign
     N = Number
     F = Fraction

   signal B : sfixed(-3 to 3) ;
     -3 -2 -1 0 1 2 3
      S N N N F F F

For UFIXED:
     signal A : ufixed(7 downto -8) ;
     signal B : ufixed(-7 to 8) ;

   For A: 7 ... 0 -1 .. -8
          NNNNNNNNN FFFFFFFF

   For B: -7 ... 0 1 .. 8
          NNNNNNNNN FFFFFFFF

If this is correct, can you please something like
the above in the proposal.
----------
In addition, can you update the bit width comments
to better reflect the package implementation:
     constant integer_width : integer := max(abs(l'left), abs(r'left));

Cheers,
Jim

-- 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Jim Lewis
Director of Training             mailto:Jim@SynthWorks.com
SynthWorks Design Inc.           http://www.SynthWorks.com
1-503-590-4787
Expert VHDL Training for Hardware Design and Verification
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Received on Tue Jul 6 19:20:58 2004

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